Hi TI Team,
We are trying to interface a TLV320AIC3254 audio codec with the OMAP-L138 using DVSDK 4_02_00_06.
We are having trouble getting the Audio interface working (I2S) and we are trying to understand how the McASP driver is setting up the transfer.
Can you please answer our question below:
According to the McASP user guide (section 2.2.1) the transmit clock is configured via the ACLKXCTL and AHCLKXCTL, however we notice that on the driver the clock is not divided down at all. Does this mean that for all sample rates that the bit clock is assumed to always be the same? This contradicts to what we understand how sample rates are controlled.
In addition, we notice that if we use the TLV320AIC3254 EVM the bit clock is configured for every sample rate.
Can you please clarify this setting?