I am currently using an OMAP3530 with an 8bit analogue video decoder chip (ADV7180).
The set up is such that the 8 bits from the ADC are connected to cam_d[11..4] of the OMAP device but it doesn't appear to be possible to detect the embedded codes for both Vertical and Horizontal syncs. After looking through the TRM, many sections seem to contradict each other and it is unclear whether connecting the 8-bit ADC to cam_d[11:4], cam_d[9:2], or cam_d[7:0] is correct.
Is it possible to use the data shifter to correct the mapping, and if so, what would the correct setting be for my case?
Also, in this mode (ITU-R BT.656), will the ISP generate interrupts for each of the vertical and horizontal syncs based on the embedded codes?
Thanks,
Andy