TDA4VM: Question about device address of DS90UB960-Q1 in TDA4VM

Hi Li,

TDA4VM board does not contain UB960. There is a separate board, known as fusion board, which includes ub960.

I think the i2c address of the ub960 on fusion board is 0x3D and it is 7 bit address.

Regards,

Brijesh

Hello Brijesh

Thank you for your quick reply. 

Let me add some backround and confirm the following additional question. 

Currently we are using Camera AR820(including Serializer UB953). And connect to Deserializer UB960 in TDA4VM fusion board. 

We confirmed the I2C address of Serializer UB953 is 0x30(8bit).

1) We want to know what is the device address of UB960?

2) We want to know in UB960 it is using use 7bit or 8bit address? And how to confirm it?

Regards, 

Li

Hi Li,

Yes, the i2c address of ub960 on fusion board is 0x3d for the instance-1 and 0x36 for the instance-2. You could find it in the Board_fpdU960GetI2CAddr API in ti-processor-sdk-rtos-j721e-evm-08_01_00_11/pdk_jacinto_08_01_00_33/packages/ti/board/src/devices/fpd/ds90ub960.c file.

Address is 7bit, but additional 1bit is used to specify read/write operation, so total 8bits.. 

Regards,

Brijesh

Hello Jadav

We still have some question. 

As I menteioned, we are using Serializer UB953 in Camera AR820. And UB953 is using 8bit address.
If Deserializer UB960 is using 7bit address, how can they communicate with each other and how can they know whether the other one is using 7bit or 8bit?

You can refer address table from data sheet.

UB953:

UB960:

Regards, 

Li

Hi LI,

Both are using 7bit address, Typically 7bit address is shift by 1 bit to create 8bit address (0x36 -> 0x6C) and lower bit is used for indicating read/write operations.. 

Regards,

Brijesh

Hello Brijesh

Thank you for your reply. 

Could you please point me out in this SDK where I can find related code of 1 bit shift for read and write?
I found the address defination in ds90ub960.c. But I can't find the bit shift related code. 

Regards, 

Li

Hello Li,

Please check file ti-processor-sdk-rtos-j721e-evm-08_00_00_12\imaging\sensor_drv\src\iss_sensors.c, it writes ub960 register using UB960_WriteReg -> Board_i2c8BitRegWr. This API uses 7bit address, which gets directly written to I2C_SA register.. 

In addition, please refer to below application note to understand how i2c transaction works. 

https://www.ti.com/lit/an/slva704/slva704.pdf

Regards,

Brijesh

Hello Jadav

Thank you for your reply. 
As you suggested, we put some print code in Board_i2c8BitRegWr.c. We'd like confirm few more questions.

You can search [TEST] to hit our print code. 

Enabling clocks!
[MCU1_0]     19.726782 s: APP: Syncing with 6 CPUs ... Done !!!
[MCU1_0]     19.726958 s: REMOTE_SERVICE: Init ... !!!
[MCU1_0]     19.735515 s: REMOTE_SERVICE: Init ... Done !!!
[MCU1_0]     19.736903 s: APP: Init ... Done !!!
[MCU2_0]     19.726777 s: APP: Syncing with 6 CPUs ... Done !!!
[MCU2_0]     19.726819 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0]     19.728332 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0]     19.728385 s: ETHFW: Init ... !!!
[MCU2_1]     19.726683 s: IPC: Init ... Done !!!
[MCU2_1]     19.726738 s: APP: Syncing with 6 CPUs ... !!!
[MCU2_1]     19.726775 s: APP: Syncing with 6 CPUs ... Done !!!
[MCU2_1]     19.726802 s: REMOTE_SERVICE: Init ... !!!
[MCU2_1]     19.728276 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_1]     19.728373 s: FVID2: Init ... !!!
[MCU2_1]     19.728435 s: FVID2: Init ... Done !!!
[MCU2_1]     19.728460 s: VHWA: DMPAC: Init ... !!!
[MCU2_1]     19.728479 s: SCICLIENT: Sciclient_pmSetModuleState module=48 state=2
[MCU2_1]     19.728649 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     19.728684 s: SCICLIENT: Sciclient_pmSetModuleState module=305 state=2
[MCU2_1]     19.728774 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     19.728801 s: VHWA: DOF Init ... !!!
[MCU2_1]     19.736863 s: VHWA: DOF Init ... Done !!!
[MCU2_1]     19.736918 s: VHWA: SDE Init ... !!!
[MCU2_1]     19.739229 s: VHWA: SDE Init ... Done !!!
[MCU2_1]     19.739272 s: VHWA: DMPAC: Init ... Done !!!
[MCU2_1]     19.739307 s:  VX_ZONE_INIT:Enabled
[MCU2_1]     19.739329 s:  VX_ZONE_ERROR:Enabled
[MCU2_1]     19.739348 s:  VX_ZONE_WARNING:Enabled
[MCU2_1]     19.740256 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DMPAC_SDE 
[MCU2_1]     19.740438 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DMPAC_DOF 
[MCU2_1]     19.740490 s:  VX_ZONE_INIT:[tivxInit:71] Initialization Done !!!
[MCU2_1]     19.740518 s: APP: OpenVX Target kernel init ... !!!
[MCU2_1]     19.740731 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_1]     19.740765 s: UDMA Copy: Init ... !!!
[MCU2_1]     19.742422 s: UDMA Copy: Init ... Done !!!
[MCU2_1]     19.742476 s: APP: Init ... Done !!!
[MCU2_1]     19.742502 s: APP: Run ... !!!
[MCU2_1]     19.742522 s: IPC: Starting echo test ...
[MCU2_1]     19.744838 s: APP: Run ... Done !!!
[MCU2_1]     19.745758 s: IPC: Echo status: mpu1_0[x] mcu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[.] C7X_1[.] 
[MCU2_1]     19.745846 s: IPC: Echo status: mpu1_0[x] mcu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[.] 
[MCU2_1]     19.745917 s: IPC: Echo status: mpu1_0[x] mcu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P] 
[MCU2_1]     19.758713 s: IPC: Echo status: mpu1_0[x] mcu1_0[P] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P] 
[C6x_1 ]     19.726776 s: APP: Syncing with 6 CPUs ... Done !!!
[C6x_1 ]     19.726792 s: REMOTE_SERVICE: Init ... !!!
[C6x_1 ]     19.727492 s: REMOTE_SERVICE: Init ... Done !!!
[C6x_1 ]     19.727531 s:  VX_ZONE_INIT:Enabled
[C6x_1 ]     19.727546 s:  VX_ZONE_ERROR:Enabled
[C6x_1 ]     19.727560 s:  VX_ZONE_WARNING:Enabled
[C6x_1 ]     19.728469 s:  VX_ZONE_INIT:[tivxInit:71] Initialization Done !!!
[C6x_1 ]     19.728487 s: APP: OpenVX Target kernel init ... !!!
[C6x_1 ]     19.728778 s: APP: OpenVX Target kernel init ... Done !!!
[C6x_1 ]     19.728801 s: UDMA Copy: Init ... !!!
[C6x_1 ]     19.732180 s: UDMA Copy: Init ... Done !!!
[C6x_1 ]     19.732198 s: APP: Init ... Done !!!
[C6x_1 ]     19.732919 s: APP: Run ... !!!
[C6x_1 ]     19.732930 s: IPC: Starting echo test ...
[C6x_1 ]     19.734256 s: APP: Run ... Done !!!
[C6x_1 ]     19.734574 s: IPC: Echo status: mpu1_0[x] mcu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[x] C7X_1[P] 
[C6x_1 ]     19.734808 s: IPC: Echo status: mpu1_0[x] mcu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[P] C7X_1[P] 
[C6x_1 ]     19.745588 s: IPC: Echo status: mpu1_0[x] mcu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P] 
[C6x_1 ]     19.758628 s: IPC: Echo status: mpu1_0[x] mcu1_0[P] mcu2_0[x] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P] 
[C6x_2 ]     19.726776 s: APP: Syncing with 6 CPUs ... Done !!!
[C6x_2 ]     19.726791 s: REMOTE_SERVICE: Init ... !!!
[C6x_2 ]     19.727510 s: REMOTE_SERVICE: Init ... Done !!!
[C6x_2 ]     19.727553 s:  VX_ZONE_INIT:Enabled
[C6x_2 ]     19.727567 s:  VX_ZONE_ERROR:Enabled
[C6x_2 ]     19.727580 s:  VX_ZONE_WARNING:Enabled
[C6x_2 ]     19.728475 s:  VX_ZONE_INIT:[tivxInit:71] Initialization Done !!!
[C6x_2 ]     19.728493 s: APP: OpenVX Target kernel init ... !!!
[C6x_2 ]     19.728789 s: APP: OpenVX Target kernel init ... Done !!!
[C6x_2 ]     19.728813 s: UDMA Copy: Init ... !!!
[C6x_2 ]     19.732303 s: UDMA Copy: Init ... Done !!!
[C6x_2 ]     19.732322 s: APP: Init ... Done !!!
[C6x_2 ]     19.733022 s: APP: Run ... !!!
[C6x_2 ]     19.733034 s: IPC: Starting echo test ...
[C6x_2 ]     19.734449 s: APP: Run ... Done !!!
[C6x_2 ]     19.734811 s: IPC: Echo status: mpu1_0[x] mcu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[.] 
[C6x_2 ]     19.734850 s: IPC: Echo status: mpu1_0[x] mcu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[P] 
[C6x_2 ]     19.745607 s: IPC: Echo status: mpu1_0[x] mcu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P] 
[C6x_2 ]     19.758644 s: IPC: Echo status: mpu1_0[x] mcu1_0[P] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P] 
[C7x_1 ]     19.726777 s: APP: Syncing with 6 CPUs ... Done !!!
[C7x_1 ]     19.726793 s: REMOTE_SERVICE: Init ... !!!
[C7x_1 ]     19.727151 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_1 ]     19.727173 s:  VX_ZONE_INIT:Enabled
[C7x_1 ]     19.727185 s:  VX_ZONE_ERROR:Enabled
[C7x_1 ]     19.727222 s:  VX_ZONE_WARNING:Enabled
[C7x_1 ]     19.727496 s:  VX_ZONE_INIT:[tivxInit:71] Initialization Done !!!
[C7x_1 ]     19.727512 s: APP: OpenVX Target kernel init ... !!!
[C7x_1 ]     19.727608 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_1 ]     19.727626 s: APP: Init ... Done !!!
[C7x_1 ]     19.727638 s: APP: Run ... !!!
[C7x_1 ]     19.727648 s: IPC: Starting echo test ...
[C7x_1 ]     19.728228 s: APP: Run ... Done !!!
[C7x_1 ]     19.734580 s: IPC: Echo status: mpu1_0[x] mcu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[x] C7X_1[s] 
[C7x_1 ]     19.734822 s: IPC: Echo status: mpu1_0[x] mcu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[P] C7X_1[s] 
[C7x_1 ]     19.745622 s: IPC: Echo status: mpu1_0[x] mcu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s] 
[C7x_1 ]     19.758678 s: IPC: Echo status: mpu1_0[x] mcu1_0[P] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s] 
[MCU1_0]     19.757774 s: APP: Run ... !!!
[MCU1_0]     19.757828 s: IPC: Starting echo test ...
[MCU1_0]     19.771008 s: IPC: Echo status: mpu1_0[x] mcu1_0[s] mcu2_0[x] mcu2_1[P] C66X_1[x] C66X_2[x] C7X_1[x] 
[MCU1_0]     19.771623 s: IPC: Echo status: mpu1_0[x] mcu1_0[s] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[x] C7X_1[x] 
[MCU1_0]     19.772284 s: IPC: Echo status: mpu1_0[x] mcu1_0[s] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[x] 
[MCU1_0]     19.772769 s: APP: Run ... Done !!!
[MCU1_0]     19.772928 s: IPC: Echo status: mpu1_0[x] mcu1_0[s] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[P] 
[MCU2_0]     20.324937 s: CPSW_9G Test on MAIN NAVSS
[MCU2_0]     20.395547 s: EnetPhy_bindDriver: PHY 12: OUI:080028 Model:23 Ver:01 <-> 'dp83867' : OK
[MCU2_0]     20.395821 s: EnetPhy_bindDriver: PHY 0: OUI:080028 Model:23 Ver:01 <-> 'dp83867' : OK
[MCU2_0]     20.396051 s: EnetPhy_bindDriver: PHY 3: OUI:080028 Model:23 Ver:01 <-> 'dp83867' : OK
[MCU2_0]     20.396289 s: EnetPhy_bindDriver: PHY 15: OUI:080028 Model:23 Ver:01 <-> 'dp83867' : OK
[MCU2_0]     20.396361 s: PHY 0 is alive
[MCU2_0]     20.396401 s: PHY 3 is alive
[MCU2_0]     20.396439 s: PHY 12 is alive
[MCU2_0]     20.396467 s: PHY 15 is alive
[MCU2_0]     20.396500 s: PHY 23 is alive
[MCU2_0]     20.398123 s: ETHFW: Version   : 0.01.01
[MCU2_0]     20.398168 s: ETHFW: Build Date: Jan 26, 2022
[MCU2_0]     20.398195 s: ETHFW: Build Time: 18:26:23
[MCU2_0]     20.398216 s: ETHFW: Commit SHA: 25cf17f6
[MCU2_0]     20.398273 s: ETHFW: Init ... DONE !!!
[MCU2_0]     20.398875 s: Starting lwIP, local interface IP is 192.168.1.200
[LWIPIF_LWIP] Enet has[MCU2_0]     20.491114 s: Host MAC address: 70:ff:76:1d:92:c2
 been started successfully
[MCU2_0]     20.505451 s: [LWIPIF_LWIP] NETIF INIT SUCCESS
[MCU2_0]     20.505511 s: Added interface 'ti1', IP is 192.168.1.200
[MCU2_0]     20.505600 s: FVID2: Init ... !!!
[MCU2_0]     20.505678 s: FVID2: Init ... Done !!!
[MCU2_0]     20.505718 s: DSS: Init ... !!!
[MCU2_0]     20.505740 s: DSS: Display type is eDP !!!
[MCU2_0]     20.505764 s: DSS: M2M Path is enabled !!!
[MCU2_0]     20.505785 s: DSS: SoC init ... !!!
[MCU2_0]     20.505805 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2
[MCU2_0]     20.506634 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     20.506679 s: SCICLIENT: Sciclient_pmSetModuleState module=297 state=2
[MCU2_0]     20.506792 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     20.506822 s: SCICLIENT: Sciclient_pmSetModuleState module=151 state=2
[MCU2_0]     20.506948 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     20.506979 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=9 parent=11
[MCU2_0]     20.507077 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]     20.507105 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=13 parent=18
[MCU2_0]     20.507187 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]     20.507217 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=1 parent=2
[MCU2_0]     20.507371 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]     20.507410 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=152 clk=1 freq=148500000
[MCU2_0]     20.508405 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
[MCU2_0]     20.508440 s: SCICLIENT: Sciclient_pmModuleClkRequest module=152 clk=1 state=2 flag=0
[MCU2_0]     20.508609 s: SCICLIENT: Sciclient_pmModuleClkRequest success
[MCU2_0]     20.508641 s: DSS: SoC init ... Done !!!
[MCU2_0]     20.508665 s: DSS: Board init ... !!!
[MCU2_0]     20.508689 s: DSS: Board init ... Done !!!
[MCU2_0]     20.730986 s: DSS: Init ... Done !!!
[MCU2_0]     20.731041 s: VHWA: VPAC Init ... !!!
[MCU2_0]     20.731068 s: SCICLIENT: Sciclient_pmSetModuleState module=290 state=2
[MCU2_0]     20.731277 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     20.731392 s: VHWA: LDC Init ... !!!
[MCU2_0]     20.762064 s: VHWA: LDC Init ... Done !!!
[MCU2_0]     20.762108 s: VHWA: MSC Init ... !!!
[MCU2_0]     20.781770 s: VHWA: MSC Init ... Done !!!
[MCU2_0]     20.781818 s: VHWA: NF Init ... !!!
[MCU2_0]     20.783545 s: VHWA: NF Init ... Done !!!
[MCU2_0]     20.783594 s: VHWA: VISS Init ... !!!
[MCU2_0]     20.813813 s: VHWA: VISS Init ... Done !!!
[MCU2_0]     20.813869 s: VHWA: VPAC Init ... Done !!!
[MCU2_0]     20.813915 s:  VX_ZONE_INIT:Enabled
[MCU2_0]     20.813943 s:  VX_ZONE_ERROR:Enabled
[MCU2_0]     20.813965 s:  VX_ZONE_WARNING:Enabled
[MCU2_0]     20.815003 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target IPU1-0 
[MCU2_0]     20.815211 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_NF 
[MCU2_0]     20.815496 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_LDC1 
[MCU2_0]     20.815741 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_MSC1 
[MCU2_0]     20.815947 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_MSC2 
[MCU2_0]     20.816152 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_VISS1 
[MCU2_0]     20.816450 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE1 
[MCU2_0]     20.816670 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE2 
[MCU2_0]     20.816881 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DISPLAY1 
[MCU2_0]     20.817081 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DISPLAY2 
[MCU2_0]     20.817283 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CSITX 
[MCU2_0]     20.817612 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE3 
[MCU2_0]     20.817827 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE4 
[MCU2_0]     20.818033 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE5 
[MCU2_0]     20.818235 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE6 
[MCU2_0]     20.969787 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE7 
[MCU2_0]     20.970033 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE8 
[MCU2_0]     20.970252 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DSS_M2M1 
[MCU2_0]     20.970583 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DSS_M2M2 
[MCU2_0]     20.970801 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DSS_M2M3 
[MCU2_0]     20.971011 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DSS_M2M4 
[MCU2_0]     20.971056 s:  VX_ZONE_INIT:[tivxInit:71] Initialization Done !!!
[MCU2_0]     20.971086 s: APP: OpenVX Target kernel init ... !!!
[MCU2_0]     21.047474 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_0]     21.047530 s: CSI2RX: Init ... !!!
[MCU2_0]     21.047557 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2
[MCU2_0]     21.047695 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     21.047727 s: SCICLIENT: Sciclient_pmSetModuleState module=26 state=2
[MCU2_0]     21.047860 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     21.047888 s: SCICLIENT: Sciclient_pmSetModuleState module=27 state=2
[MCU2_0]     21.047985 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     21.048013 s: SCICLIENT: Sciclient_pmSetModuleState module=147 state=2
[MCU2_0]     21.048085 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     21.048111 s: SCICLIENT: Sciclient_pmSetModuleState module=148 state=2
[MCU2_0]     21.048185 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     21.048938 s: CSI2RX: Init ... Done !!!
[MCU2_0]     21.048987 s: CSI2TX: Init ... !!!
[MCU2_0]     21.049014 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2
[MCU2_0]     21.049098 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     21.049128 s: SCICLIENT: Sciclient_pmSetModuleState module=28 state=2
[MCU2_0]     21.049238 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     21.049264 s: SCICLIENT: Sciclient_pmSetModuleState module=296 state=2
[MCU2_0]     21.049456 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     21.049968 s: CSI2TX: Init ... Done !!!
[MCU2_0]     21.050013 s: ISS: Init ... !!!
[MCU2_0]     21.050045 s: Found sensor IMX390-UB953_D3 at location 0 
[MCU2_0]     21.050079 s: Found sensor AR0233-UB953_MARS at location 1 
[MCU2_0]     21.050111 s: Found sensor AR0820-UB953_LI at location 2 
[MCU2_0]     21.050141 s: Found sensor UB9xxx_RAW12_TESTPATTERN at location 3 
[MCU2_0]     21.050172 s: Found sensor UB96x_UYVY_TESTPATTERN at location 4 
[MCU2_0]     21.050200 s: Found sensor GW_AR0233_UYVY at location 5 
[MCU2_0]     21.050228 s: IssSensor_Init ... Done !!!
[MCU2_0]     21.050401 s: vissRemoteServer_Init ... Done !!!
[MCU2_0]     21.050477 s: IttRemoteServer_Init ... Done !!!
[MCU2_0]     21.050512 s: UDMA Copy: Init ... !!!
[MCU1_0]     21.253700 s: IPC: Echo status: mpu1_0[x] mcu1_0[s] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[P] 
[MCU2_0]     21.252566 s: UDMA Copy: Init ... Done !!!
[MCU2_0]     21.252650 s: APP: Init ... Done !!!
[MCU2_0]     21.252682 s: APP: Run ... !!!
[MCU2_0]     21.252704 s: IPC: Starting echo test ...
[MCU2_0]     21.254820 s: IPC: Echo status: mpu1_0[x] mcu1_0[P] mcu2_0[s] mcu2_1[x] C66X_1[x] C66X_2[x] C7X_1[x] 
[MCU2_0]     21.255510 s: IPC: Echo status: mpu1_0[x] mcu1_0[P] mcu2_0[s] mcu2_1[P] C66X_1[x] C66X_2[x] C7X_1[x] 
[MCU2_0]     21.256058 s: IPC: Echo status: mpu1_0[x] mcu1_0[P] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[x] C7X_1[x] 
[MCU2_0]     21.256749 s: IPC: Echo status: mpu1_0[x] mcu1_0[P] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[x] 
[MCU2_0]     21.257263 s: APP: Run ... Done !!!
[MCU2_0]     21.257442 s: IPC: Echo status: mpu1_0[x] mcu1_0[P] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[P] 
[MCU2_0]     21.257502 s: EthApp_TaskFxn create
[MCU2_1]     21.253678 s: IPC: Echo status: mpu1_0[x] mcu1_0[P] mcu2_0[P] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P] 
[C6x_1 ]     21.253596 s: IPC: Echo status: mpu1_0[x] mcu1_0[P] mcu2_0[P] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P] 
[C6x_2 ]     21.253613 s: IPC: Echo status: mpu1_0[x] mcu1_0[P] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P] 
[C7x_1 ]     21.253629 s: IPC: Echo status: mpu1_0[x] mcu1_0[P] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s] 
[MCU2_0]     22.504744 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_CREATE 
[MCU2_0]     22.504870 s: UB960 config start 
[MCU2_0]     22.504938 s: [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:1 regData:2
[MCU2_0]     22.536363 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:1F regData:0
[MCU2_0]     22.536526 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:D regData:90
[MCU2_0]     22.538350 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:C regData:F
[MCU2_0]     22.539343 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:1
[MCU2_0]     22.555334 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:58 regData:5E
[MCU2_0]     22.556338 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:72 regData:0
[MCU2_0]     22.557339 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:12
[MCU2_0]     22.573348 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:58 regData:5E
[MCU2_0]     22.574348 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:24
[MCU2_0]     22.590336 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:58 regData:5E
[MCU2_0]     22.591337 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:38
[MCU2_0]     22.607334 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:58 regData:5E
[MCU2_0]     22.608337 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:20 regData:0
[MCU2_0]     22.609338 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:10 regData:83
[MCU2_0]     22.610334 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:11 regData:A3
[MCU2_0]     22.611403 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:12 regData:C3
[MCU2_0]     22.612349 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:13 regData:E3
[MCU2_0]     22.613339 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:1
[MCU2_0]     22.629336 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:32 regData:1
[MCU2_0]     22.630347 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:33 regData:2
[MCU2_0]     22.631338 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:BC regData:0
[MCU2_0]     22.632336 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:5D regData:30
[MCU2_0]     22.633336 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:65 regData:FF
[MCU2_0]     22.634336 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:5E regData:FF
[MCU2_0]     22.635337 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:66 regData:FF
[MCU2_0]     22.636334 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:6D regData:6C
[MCU2_0]     22.636475 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:72 regData:0
[MCU2_0]     22.636612 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:12
[MCU2_0]     22.652356 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:32 regData:1
[MCU2_0]     22.653348 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:33 regData:2
[MCU2_0]     22.654337 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:BC regData:0
[MCU2_0]     22.655335 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:5D regData:30
[MCU2_0]     22.656336 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:65 regData:FF
[MCU2_0]     22.657335 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:5E regData:FF
[MCU2_0]     22.658334 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:66 regData:FF
[MCU2_0]     22.659334 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:6D regData:6C
[MCU2_0]     22.659474 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:72 regData:55
[MCU2_0]     22.659611 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:24
[MCU2_0]     22.675332 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:32 regData:1
[MCU2_0]     22.676338 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:33 regData:2
[MCU2_0]     22.677335 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:BC regData:0
[MCU2_0]     22.678335 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:5D regData:30
[MCU2_0]     22.679331 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:65 regData:FF
[MCU2_0]     22.680342 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:5E regData:FF
[MCU2_0]     22.681342 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:66 regData:FF
[MCU2_0]     22.682337 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:6D regData:6C
[MCU2_0]     22.682479 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:72 regData:AA
[MCU2_0]     22.682615 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:38
[MCU2_0]     22.698343 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:32 regData:1
[MCU2_0]     22.699345 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:33 regData:2
[MCU2_0]     22.700340 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:BC regData:0
[MCU2_0]     22.701337 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:5D regData:30
[MCU2_0]     22.702335 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:65 regData:FF
[MCU2_0]     22.703334 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:5E regData:FF
[MCU2_0]     22.704336 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:66 regData:FF
[MCU2_0]     22.705331 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:6D regData:6C
[MCU2_0]     22.705473 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:72 regData:FF
[MCU2_0]     22.705609 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:FF regData:0
[MCU2_0]     22.705728 s: End of UB960 config 
[MCU2_0]     22.705754 s: UB960 config start 
[MCU2_0]     22.705792 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:1 regData:2
[MCU2_0]     22.737343 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:1F regData:0
[MCU2_0]     22.737497 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:D regData:90
[MCU2_0]     22.738346 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:C regData:F
[MCU2_0]     22.739335 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:4C regData:1
[MCU2_0]     22.755334 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:58 regData:5E
[MCU2_0]     22.756339 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:72 regData:0
[MCU2_0]     22.757338 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:4C regData:12
[MCU2_0]     22.773356 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:58 regData:5E
[MCU2_0]     22.774345 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:4C regData:24
[MCU2_0]     22.790333 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:58 regData:5E
[MCU2_0]     22.791339 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:4C regData:38
[MCU2_0]     22.807333 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:58 regData:5E
[MCU2_0]     22.808339 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:20 regData:0
[MCU2_0]     22.809338 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:10 regData:83
[MCU2_0]     22.810333 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:11 regData:A3
[MCU2_0]     22.811338 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:12 regData:C3
[MCU2_0]     22.812400 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:13 regData:E3
[MCU2_0]     22.813347 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:4C regData:1
[MCU2_0]     22.829334 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:32 regData:1
[MCU2_0]     22.830347 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:33 regData:2
[MCU2_0]     22.831334 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:BC regData:0
[MCU2_0]     22.832335 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:5D regData:30
[MCU2_0]     22.833339 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:65 regData:FF
[MCU2_0]     22.834337 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:5E regData:FF
[MCU2_0]     22.835335 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:66 regData:FF
[MCU2_0]     22.836337 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:6D regData:6C
[MCU2_0]     22.836477 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:72 regData:0
[MCU2_0]     22.836615 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:4C regData:12
[MCU2_0]     22.852392 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:32 regData:1
[MCU2_0]     22.853352 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:33 regData:2
[MCU2_0]     22.854342 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:BC regData:0
[MCU2_0]     22.855339 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:5D regData:30
[MCU2_0]     22.856334 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:65 regData:FF
[MCU2_0]     22.857339 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:5E regData:FF
[MCU2_0]     22.858334 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:66 regData:FF
[MCU2_0]     22.859336 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:6D regData:6C
[MCU2_0]     22.859475 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:72 regData:55
[MCU2_0]     22.859611 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:4C regData:24
[MCU2_0]     22.875331 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:32 regData:1
[MCU2_0]     22.876337 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:33 regData:2
[MCU2_0]     22.877337 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:BC regData:0
[MCU2_0]     22.878340 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:5D regData:30
[MCU2_0]     22.879333 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:65 regData:FF
[MCU2_0]     22.880343 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:5E regData:FF
[MCU2_0]     22.881339 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:66 regData:FF
[MCU2_0]     22.882336 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:6D regData:6C
[MCU2_0]     22.882478 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:72 regData:AA
[MCU2_0]     22.882612 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:4C regData:38
[MCU2_0]     22.898346 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:32 regData:1
[MCU2_0]     22.899354 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:33 regData:2
[MCU2_0]     22.900340 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:BC regData:0
[MCU2_0]     22.901337 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:5D regData:30
[MCU2_0]     22.902338 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:65 regData:FF
[MCU2_0]     22.903333 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:5E regData:FF
[MCU2_0]     22.904333 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:66 regData:FF
[MCU2_0]     22.905333 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:6D regData:6C
[MCU2_0]     22.905472 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:72 regData:FF
[MCU2_0]     22.905607 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:FF regData:0
[MCU2_0]     22.905726 s: End of UB960 config 
[MCU2_0]     22.906334 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_QUERY 
[MCU2_0]     22.906377 s: Received Query for AR0820-UB953_LI 
[MCU2_0]     22.907326 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_PWRON 
[MCU2_0]     22.907369 s: IM_SENSOR_CMD_PWRON : channel_mask = 0x1 
[MCU2_0]     22.908322 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_CONFIG 
[MCU2_0]     22.908364 s: Application requested features = 0x158 
[MCU2_0]  
[MCU2_0]     22.908402 s: UB960 config start 
[MCU2_0]     22.908452 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:1
[MCU2_0]     22.924340 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:65 regData:E8
[MCU2_0]     22.940346 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:66 regData:80
[MCU2_0]     22.956335 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:72 regData:0
[MCU2_0]     22.972431 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:12
[MCU2_0]     22.988338 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:65 regData:EC
[MCU2_0]     23.004334 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:66 regData:84
[MCU2_0]     23.020344 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:72 regData:55
[MCU2_0]     23.036337 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:24
[MCU2_0]     23.052330 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:65 regData:F0
[MCU2_0]     23.068344 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:66 regData:88
[MCU2_0]     23.084335 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:72 regData:AA
[MCU2_0]     23.100343 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:38
[MCU2_0]     23.116334 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:65 regData:F4
[MCU2_0]     23.132333 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:66 regData:8C
[MCU2_0]     23.148343 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:72 regData:FF
[MCU2_0]     23.164338 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:FF regData:0
[MCU2_0]     23.164469 s: End of UB960 config 
[MCU2_0]     23.164501 s: UB960 config start 
[MCU2_0]     23.164544 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:4C regData:1
[MCU2_0]     23.180351 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:65 regData:D8
[MCU2_0]     23.196334 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:66 regData:90
[MCU2_0]     23.212333 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:72 regData:0
[MCU2_0]     23.228342 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:4C regData:12
[MCU2_0]     23.244335 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:65 regData:DC
[MCU2_0]     23.260344 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:66 regData:94
[MCU2_0]     23.276336 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:72 regData:55
[MCU2_0]     23.292333 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:4C regData:24
[MCU2_0]     23.308345 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:65 regData:E0
[MCU2_0]     23.324336 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:66 regData:98
[MCU2_0]     23.340348 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:72 regData:AA
[MCU2_0]     23.356337 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:4C regData:38
[MCU2_0]     23.372333 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:65 regData:E4
[MCU2_0]     23.388344 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:66 regData:9C
[MCU2_0]     23.404335 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:72 regData:FF
[MCU2_0]     23.420340 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:FF regData:0
[MCU2_0]     23.420475 s: End of UB960 config 
[MCU2_0]     23.420504 s: Configuring camera # 0 
[MCU2_0]     23.420554 s: 
[MCU2_0] [TEST]Board_i2c8BitRegRd slaveAddr:3D regAddr:4C
[MCU2_0]     23.420717 s: UB960 config start 
[MCU2_0]     23.420760 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:1
[MCU2_0]     23.421346 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:65 regData:E8
[MCU2_0]     23.422340 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:5E regData:20
[MCU2_0]     23.423338 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:66 regData:80
[MCU2_0]     23.424335 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:FF regData:0
[MCU2_0]     23.424459 s: End of UB960 config 
[MCU2_0]     23.474311 s: ub953 config start : slaveAddr = 0x74 
[MCU2_0]     23.474379 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:74 regAddr:1 regData:2
[MCU2_0]     24.474371 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:74 regAddr:E regData:F0
[MCU2_0]     24.475363 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:74 regAddr:D regData:F
[MCU2_0]     24.476361 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:74 regAddr:FF regData:0
[MCU2_0]     24.476500 s:  End of UB953 config 
[MCU2_0]     24.526322 s:  Configuring AR0820 imager .. Please wait till it finishes 
[MCU2_0]     24.527507 s: 
[MCU2_0] AR0820_WriteReg : Error writing to register 0x301a 
[MCU2_0]     24.527550 s:   
[MCU2_0]     24.527568 s:  
[MCU2_0]     24.527593 s:  AR0820: Sensor Reg Write Failed for regAddr 0x301a 
[MCU2_0]     24.527621 s:  
[MCU2_0]     25.603322 s:  AR0820 config done
[MCU2_0]     25.603372 s: IM_SENSOR_CMD_CONFIG returning status = 0 
[MCU2_0]     25.644361 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_STREAM_ON 
[MCU2_0]     25.644430 s: IM_SENSOR_CMD_STREAM_ON:  channel_mask = 0x1
[MCU2_0]     25.644469 s: UB960 config start 
[MCU2_0]     25.644523 s: [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:1
[MCU2_0]     25.660348 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:65 regData:E8
[MCU2_0]     25.676344 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:66 regData:80
[MCU2_0]     25.692334 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:72 regData:0
[MCU2_0]     25.708359 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:12
[MCU2_0]     25.724360 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:65 regData:EC
[MCU2_0]     25.740367 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:66 regData:84
[MCU2_0]     25.756346 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:72 regData:55
[MCU2_0]     25.772356 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:24
[MCU2_0]     25.788361 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:65 regData:F0
[MCU2_0]     25.804364 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:66 regData:88
[MCU2_0]     25.820365 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:72 regData:AA
[MCU2_0]     25.836348 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:4C regData:38
[MCU2_0]     25.852358 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:65 regData:F4
[MCU2_0]     25.868361 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:66 regData:8C
[MCU2_0]     25.884360 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:72 regData:FF
[MCU2_0]     25.900344 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:FF regData:0
[MCU2_0]     25.900476 s: End of UB960 config 
[MCU2_0]     25.900506 s: UB960 config start 
[MCU2_0]     25.900548 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:4C regData:1
[MCU2_0]     25.916344 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:65 regData:D8
[MCU2_0]     25.932333 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:66 regData:90
[MCU2_0]     25.948370 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:72 regData:0
[MCU2_0]     25.964362 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:4C regData:12
[MCU2_0]     25.980353 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:65 regData:DC
[MCU2_0]     25.996370 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:66 regData:94
[MCU2_0]     26.012357 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:72 regData:55
[MCU2_0]     26.028366 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:4C regData:24
[MCU2_0]     26.044363 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:65 regData:E0
[MCU2_0]     26.060346 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:66 regData:98
[MCU2_0]     26.076360 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:72 regData:AA
[MCU2_0]     26.092356 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:4C regData:38
[MCU2_0]     26.108363 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:65 regData:E4
[MCU2_0]     26.124345 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:66 regData:9C
[MCU2_0]     26.140358 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:72 regData:FF
[MCU2_0]     26.156363 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:36 regAddr:FF regData:0
[MCU2_0]     26.156503 s: End of UB960 config 
[MCU2_0]     26.166311 s: UB960 config start 
[MCU2_0]     26.166376 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:33 regData:3
[MCU2_0]     26.182338 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:FF regData:0
[MCU2_0]     26.182468 s: End of UB960 config 
[MCU2_0]     26.183605 s:  VX_ZONE_WARNING:[tivxCaptureSetTimeout:772]  CAPTURE: WARNING: Error frame not provided using tivxCaptureRegisterErrorFrame, defaulting to waiting forever !!!
[MCU2_0]     26.257350 s: =======================================================
[MCU2_0]     26.257418 s:             CPSW Ethernet Firmware UDP Communication   
[MCU2_0]     26.257455 s: =======================================================
[MCU2_0]     26.257540 s: keep connecting....
[MCU2_0]     26.257580 s: Connection established!!
[MCU2_0]     30.888190 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_STREAM_OFF 
[MCU2_0]     30.888262 s: IM_SENSOR_CMD_STREAM_ON:  channel_mask = 0x1
[MCU2_0]     30.898328 s: UB960 config start 
[MCU2_0]     30.898404 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:33 regData:2
[MCU2_0]     30.914348 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:FF regData:0
[MCU2_0]     30.914480 s: End of UB960 config 
[MCU2_0]     30.999232 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_STREAM_OFF 
[MCU2_0]     30.999340 s: IM_SENSOR_CMD_STREAM_ON:  channel_mask = 0x1
[MCU2_0]     31.009315 s: UB960 config start 
[MCU2_0]     31.009390 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:33 regData:2
[MCU2_0]     31.025337 s: 
[MCU2_0] [TEST]Board_i2c8BitRegWr slaveAddr:3D regAddr:FF regData:0
[MCU2_0]     31.025472 s: End of UB960 config 
[MCU2_0]     31.026491 s: 
[MCU2_0] ==========================================================
[MCU2_0]     31.026562 s:  Capture Status: Instance|0
[MCU2_0]     31.026605 s: ==========================================================
[MCU2_0]     31.026643 s:  overflowCount: 0
[MCU2_0]     31.026671 s:  spuriousUdmaIntrCount: 0
[MCU2_0]     31.026697 s:  frontFIFOOvflCount: 0
[MCU2_0]     31.026721 s:  crcCount: 0
[MCU2_0]     31.026743 s:  eccCount: 0
[MCU2_0]     31.026765 s:  correctedEccCount: 0
[MCU2_0]     31.026790 s:  dataIdErrorCount: 0
[MCU2_0]     31.026815 s:  invalidAccessCount: 0
[MCU2_0]     31.026839 s:  invalidSpCount: 0
[MCU2_0]     31.026865 s:  strmFIFOOvflCount[0]: 0
[MCU2_0]     31.026892 s:  strmFIFOOvflCount[1]: 0
[MCU2_0]     31.026919 s:  strmFIFOOvflCount[2]: 83
[MCU2_0]     31.026946 s:  strmFIFOOvflCount[3]: 13
[MCU2_0]     31.026986 s:  Channel Num | Frame Queue Count | Frame De-queue Count | Frame Drop Count | Error Frame Count |
[MCU2_0]     31.027040 s:            0 |               125 |                  125 |                1 |                 0 |
[MCU2_0]     31.028117 s: ==========================================================
[MCU2_0]     31.028186 s:  Capture Status: Instance|1
[MCU2_0]     31.028226 s: ==========================================================
[MCU2_0]     31.028264 s:  overflowCount: 0
[MCU2_0]     31.028289 s:  spuriousUdmaIntrCount: 0
[MCU2_0]     31.028364 s:  frontFIFOOvflCount: 0
[MCU2_0]     31.028394 s:  crcCount: 0
[MCU2_0]     31.028415 s:  eccCount: 0
[MCU2_0]     31.028439 s:  correctedEccCount: 0
[MCU2_0]     31.028465 s:  dataIdErrorCount: 0
[MCU2_0]     31.028491 s:  invalidAccessCount: 0
[MCU2_0]     31.028516 s:  invalidSpCount: 0
[MCU2_0]     31.028540 s:  strmFIFOOvflCount[0]: 0
[MCU2_0]     31.028567 s:  strmFIFOOvflCount[1]: 1
[MCU2_0]     31.028594 s:  strmFIFOOvflCount[2]: 83
[MCU2_0]     31.028622 s:  strmFIFOOvflCount[3]: 13
[MCU2_0]     31.028662 s:  Channel Num | Frame Queue Count | Frame De-queue Count | Frame Drop Count | Error Frame Count |

1) We confirmed in this code, it is calling both 0x3D for instance-1 and 0x36 for instance-2. We want to know why it is calling both 0x3D and 0x36? And what is the purpose to call both of them?

2)How can we know 0x36 and 0x3D they are 7bit or 8bit?

3)In the test code, we confirmed it is accessing SlaveID[0] register(address 0x5D) and SlaveID[1] register(address 0x5E). 

3-1) Our understanding is it is means Serializer UB953 Slave[0] address is 0x30 and Serializer UB953 Slave[1] address is 0xFF. Is our understanding correct or not?
3-2) Basd on the table 7-10 SlaveID[0] register, bit0 is reserved. So it is actually 7bit 0x18. Is our understanding correct? 

3-3) Why bit0 is reserved? it is reserved for read or write?

0x3d	0x5d	0x30	#SlaveID[0]	
0x3d	0x65	0xff	#SlaveAlias[0]	
0x3d	0x5e	0xff	#SlaveID[1]	
0x3d	0x66	0xff	#SlaveAlias[1]	
0x36	0x5d	0x30
0x36	0x65	0xff
0x36	0x5e	0xff
0x36	0x66	0xff

4) Based on your reply Address is 7bit and shift 1 bit for read or write. However in the address table, there is also 8-bit adress. For 0x3D(7bit), 8bit adress is 0x71A. We'd like to know why you also define 8bit adress and in what case 8bit address will be used?

Regards, 

Li

Hi Li,

Xin Li said:

1) We confirmed in this code, it is calling both 0x3D for instance-1 and 0x36 for instance-2. We want to know why it is calling both 0x3D and 0x36? And what is the purpose to call both of them?

How many channels are you trying to capture? If you are using more than 4 camera input, then it will try to configure both the instances of ub960..

Xin Li said:

2)How can we know 0x36 and 0x3D they are 7bit or 8bit?

both, 0x3d and 0x36 are 7bit addresses

Xin Li said:

3)In the test code, we confirmed it is accessing SlaveID[0] register(address 0x5D) and SlaveID[1] register(address 0x5E). 

ok, can you also check the lock status?

Xin Li said:

3-1) Our understanding is it is means Serializer UB953 Slave[0] address is 0x30 and Serializer UB953 Slave[1] address is 0xFF. Is our understanding correct or not?

It could be, but before that, can you check the lock status? if the link is locked, then you could read valid i2c address in these registers.

Xin Li said:

3-2) Basd on the table 7-10 SlaveID[0] register, bit0 is reserved. So it is actually 7bit 0x18. Is our understanding correct? 

Yes

Xin Li said:

3-3) Why bit0 is reserved? it is reserved for read or write?

Please ignore bit0, just use upper 7bit as a slave address

Xin Li said:

4) Based on your reply Address is 7bit and shift 1 bit for read or write. However in the address table, there is also 8-bit adress. For 0x3D(7bit), 8bit adress is 0x71A. We'd like to know why you also define 8bit adress and in what case 8bit address will be used?

8bit address is just left shifted 7bit address. 7bit address will be appended by 1bit for indicating read/write operation to create 8bit address.. I would suggest you to refer to below application note to understand how i2c works.

www.ti.com/.../slva704.pdf

Regards,

Brijesh

Hello Jadav

Thank you for your quick reply. Let me reply your question. 

Brijesh Jadav said:

Xin Li said:

1) We confirmed in this code, it is calling both 0x3D for instance-1 and 0x36 for instance-2. We want to know why it is calling both 0x3D and 0x36? And what is the purpose to call both of them?

How many channels are you trying to capture? If you are using more than 4 camera input, then it will try to configure both the instances of ub960..

Only 1 channel

Brijesh Jadav said:

Xin Li said:

3)In the test code, we confirmed it is accessing SlaveID[0] register(address 0x5D) and SlaveID[1] register(address 0x5E). 

ok, can you also check the lock status?

Xin Li said:

3-1) Our understanding is it is means Serializer UB953 Slave[0] address is 0x30 and Serializer UB953 Slave[1] address is 0xFF. Is our understanding correct or not?

It could be, but before that, can you check the lock status? if the link is locked, then you could read valid i2c address in these registers.

Lock status is 1. 

Brijesh Jadav said:

Xin Li said:

4) Based on your reply Address is 7bit and shift 1 bit for read or write. However in the address table, there is also 8-bit adress. For 0x3D(7bit), 8bit adress is 0x71A. We'd like to know why you also define 8bit adress and in what case 8bit address will be used?

8bit address is just left shifted 7bit address. 7bit address will be appended by 1bit for indicating read/write operation to create 8bit address.. I would suggest you to refer to below application note to understand how i2c works.

www.ti.com/.../slva704.pdf

We confirmed the application note you share. I know the point is Device address is 7bit. 
But 8bit address defined as below is really confused us. Can we know the backgrond TI define 8Bit here?

Regards, 

Li

Hi LI,

Xin Li said:

Only 1 channel

ok

Xin Li said:

Lock status is 1. 

ok, if the lock status is set, then you could read serializer i2c address.

Xin Li said:

We confirmed the application note you share. I know the point is Device address is 7bit. 
But 8bit address defined as below is really confused us. Can we know the backgrond TI define 8Bit here?

What is the confusion here? 8bit address is 1bit left shifted 7bit address.. 

Regards,

Brijesh

Hello Jadav, 

Thank you for your reply. 

#1

As i explained we are using only 1 channel and lock statsu is 1, can you please reply to my first question as below?

Xin Li said:

1) We confirmed in this code, it is calling both 0x3D for instance-1 and 0x36 for instance-2. We want to know why it is calling both 0x3D and 0x36? And what is the purpose to call both of them?

#2

The point confused us is in table there is defination for both 7bit and 8bit, it gives us impresstion that 7bit and 8bit are different and used in different case.

Based on your explaination, 8bit just 1 bit shift and it is equivalent to 7bit. Is my understanding correct?

Brijesh Jadav said:

We confirmed the application note you share. I know the point is Device address is 7bit. 
But 8bit address defined as below is really confused us. Can we know the backgrond TI define 8Bit here?

What is the confusion here? 8bit address is 1bit left shifted 7bit address.. 

Regards, 

Li

Hi LI,

Xin Li said:

As i explained we are using only 1 channel and lock statsu is 1, can you please reply to my first question as below?

I think that is how the common configuration is set in the imaging component. In the API IssSensor_DeserializerInit, in the file ti-processor-sdk-rtos-j721e-evm-08_01_00_13\imaging\sensor_drv\src\iss_sensors.c, the common configuration is set for both the ub960. You could remove it if you dont require it.. 

Xin Li said:

The point confused us is in table there is defination for both 7bit and 8bit, it gives us impresstion that 7bit and 8bit are different and used in different case.

Based on your explaination, 8bit just 1 bit shift and it is equivalent to 7bit. Is my understanding correct?

Yes, that's correct.

Regards,

Brijesh