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DM6437 SPI problem

I am programming on using SPI function, the master device is NXP ARM chip and slave is DM6437. I configured the SPI word length as 16bit and set CLKGDV = 0.

The master device sends the bytes from 0x0000 to 0x03E8 by a for loop, the received result of DM6437(slave) is correct if master's data rate under 4 Mbit / Sec.

It will be lost some data when I set data rate above 4 Mbit / Sec on master, does the SPI data rate of DM6437 on slave mode able to over 4 Mbit / Sec ?

My SPI initial function :

Int16 EVMDM6437_SPI_Init ( )

{

      MCBSP0_SPCR &= ~(1 << 16) ;    // XRST

      MCBSP0_SPCR &= ~(1 << 0) ;      // RRST

      MCBSP0_SPCR &= ~(1 << 22) ;   // GRST

      MCBSP0_SPCR = ( 2 << 11 ) ;        // CLKSTP = 2h

      MCBSP0_PCR = ( 1 << 3 ) ;            // FSXP = 1

      MCBSP0_SRGR = ( 1 << 29 ) ;      // CLKSM = 1 , CLKGDV = 0

      MCBSP0_XCR = (  2 << 5 ) ;           // transmit word length = 16 bit

      MCBSP0_RCR = ( 2 << 5 ) ;          // receipt word length = 16 bit

      MCBSP0_SPCR |= ( 1 << 22 ) ;   // GRST

      delay( ) ;

      MCBSP0_SPCR |= ( 1 << 0 ) ;     // RRST

      return ;

}

 

  • One important thing to note and documented in the device datasheet under table 6-63 is that for all SPI SLAVE modes the rate of the internal clock (CLKG) must be at least 8 times faster than that of the SPI data rate.  Please ensure that it is not the case as it could cause issues if not followed.

     

  • MCBSP0_SRGR = ( 1 << 29 ) ;   // CLKSM = 1 ,  CLKGDV = 0

    MCBSP0_PCR = ( 1 << 3 ) ;            // FSXP = 1 , and SCLKME = 0

    Thus the input clock uses MCBSP internal input clock.

    EVMDM6437_enablePll1 ( 0, 21 ) ;          // [DSP @ 594MHz][Core @ 1.20V] [CLKIN @ 27MHz]

    The MCBSP internal clock is the CPU/6 clock = 594MHz / 6 = 99MHz   (Peripherals CLKDIV6)

    CLKG = FIn / (CLKGDV + 1) = 99MHz / (0 + 1) = 99MHz

    CLKG must be at least 8 times faster than SPI data rate , therefore  the maximum SPI data rate = 99MHz / 8 = 12.375MHz

    Does the calculation correct ?

     

    By the way, I done the test by using ICE emulation to watch the transmission result, due to I have no idea how to verify the data correctness without a ICE.

    Does any difference for the data rate if I use ICE emulation ?


  • Wen,

    thanks for the details.

    For the Mcbsp operating in SPI mode, the CLKGDV must equal=1.  The required register values for configuring mcbsp as SPI are listed in Table 21 of http://focus.ti.com/lit/ug/spru943c/spru943c.pdf guide.    So the calculation above will change.  I am not familiar with the ICE emulation so I would not be able to comment on that.

    regards,

    miguel