I have some confusion over recommendations in the AM37x/DM37x Schematic Checklist (http://processors.wiki.ti.com/index.php/AM37x/DM37x_Schematic_Checklist#MMC_interface) and device features described in the DS and TRM. The Checklist section on MMC recommends 10K PU on MMC_CMD, MMC_DATx balls.
However, in the DS, Table 2-1 states that the MMC1 lines have internal PU/PD circuits. Why would I need to use external PU rather than use the internal PU? It seems to be redundant. Can someone please explain the external PU need to me?
Regards.
