DRA829V: Clock tree

Bill Morgan

Part Number: DRA829V
Other Parts Discussed in Thread: TDA4VM

This thread says you can get the clock tree information from some tool in the SDK. How do you get the report?

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1069428/tda4vm-clock-tree-tool-where-i-can-get-it/3963053

We do not offer a Clock Tree Tool for the TDA4VM device.

The SDK can provide a report of the clock frequencies across the SoC.

over 3 years ago

+1 Brad Caldwell over 3 years ago

TI__Genius 12595 points

Hi Bill,

There's a utility called k3conf you can use to dump a complete clock table

root@j7-evm:~# k3conf dump clock

Full source is on git, here's the readme

https://git.ti.com/cgit/k3conf/k3conf/tree/README.md

You can type

Type "./k3conf --help" to get complete list of available commands and options.

0 Bill Morgan over 3 years ago

Expert 1550 points

The k3conf tool sends a message to the sci to get the clock information:

ti_sci_cmd_get_clk_freq(c[row].dev_id, c[row].clk_id,

&freq);

but where does the sci get the information?

What registers is sci reading to get the clock frequency for this clock?

Device 365, clock 3

365	J721S2_DEV_SERDES_10G0

From <https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j721s2/devices.html>

DEV_SERDES_10G0_CORE_REF_CLK

Input muxed clock

From <https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html>

0 kcastille over 3 years ago in reply to Bill Morgan

TI__Guru 55447 points

Hello,

Sorry for the delay. If you refer to the TRM Clocking chapter you can get a sense of this. In summary, there are several PLLs that have multiplier/divider registers (and sometimes hard coded dividers) and mux select registers to determine which source clocks are routed to which endpoints. It's non-trivial to try to reverse engineer this.

Regards,

Kyle

Processors

Processors forum

DRA829V: Clock tree