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Enabling cache on ARM in OMAP-L138?

MikeH
Guru 15580 points

I am running into similar program crash issues as Thomas experienced in THIS THREAD, but unfortunately, I have not been able to fix the problem by commenting out the MMU enable bit. Can someone provide some guidance on how to properly enable the I and D caches on the ARM?

Here is the code that I stole from the other thread. I call it just after enabling privileged mode.

CP15_CTL_MMU_ENABLE .equ 0x0001

CP15_CTL_ALIGN_FAULT_ENABLE .equ 0x0002

CP15_CTL_INST_CACHE_ENABLE .equ 0x0004

CP15_CTL_DATA_CACHE_ENABLE .equ 0x1000

 

;__CACHE_enable .long CACHE_enable

 

.global CACHE_enable

 

CACHE_enable:.asmfunc

mov r0, #0

mrc p15, #0, r0, c1, c0, #0

; orr r0, r0, #CP15_CTL_MMU_ENABLE

orr r0, r0, #CP15_CTL_ALIGN_FAULT_ENABLE

orr r0, r0, #CP15_CTL_INST_CACHE_ENABLE

orr r0, r0, #CP15_CTL_DATA_CACHE_ENABLE

mcr p15, #0, r0, c1, c0, #0

mov r0, r0

mov r0, r0

mov r0, r0

mov r0, r0

mov r0, r0

.endasmfunc

If i leave MMU enabled, the program crashes in an ugly way (memory trashed and must reload program). If I disable MMU the program executes the code above the loops back to the beginning of main.c and starts over.

I appreciate your thoughts and help on this.

Thx,

MikeH

 

  • 0
    Guru 26430 points

    I think you have the data and instruction bitmask swapped. I guess it does not matter since both are enabled in your code. I vaguely remember MMU functionality requires a complicated set up of TLBs. If you don't need virtual memory, I suggest avoiding the MMU. Data cache can play havoc with HW drivers. You have to carefully add memory barriers at appropriate places.

    CP15_CTL_INST_CACHE_ENABLE  .equ 0x1000
    CP15_CTL_DATA_CACHE_ENABLE  .equ 0x0004
    CP15_CTL_ALIGN_FAULT_ENABLE .equ 0x0002
    CP15_CTL_MMU_ENABLE         .equ 0x0001

    .global ICACHE_enable
    ICACHE_enable:.asmfunc
    mov r0, #0
    mrc p15, #0, r0, c1, c0, #0
    orr r0, r0, #CP15_CTL_INST_CACHE_ENABLE
    mcr p15, #0, r0, c1, c0, #0
    mov r0, r0
    mov r0, r0
    mov r0, r0
    mov r0, r0
    mov r0, r0
    .endasmfunc

    Using instruction cache only can noticeably speed things up. Especially with tight loops that fit entirely in cache. Unrolled loops are bad here.

     

  • 0 in reply to Norman Wong
    Guru 15580 points

    Norman,

    Norman Wong said:
    I think you have the data and instruction bitmask swapped

    Aha...so I do. Thanks for preventing some future head-scratching exercise.

    Norman Wong said:
    Using instruction cache only can noticeably speed things up

    You are very correct. It has improved my specific algorithm performance by a factor of 6. Unfortunately, I am still a factor of 20 away from where I need to be.

    BTW, my crash problem was lack context saving. Since this code is a called C function, and I had no context save/restore, the PC got lost after executing the above. After adding context save/restore all is working well!

    Thanks again for chipping in!

    MikeH