AM6442: GPMC and PLL questions

rei

Mastermind 6155 points

Part Number: AM6442

Hi TI experts,

My customers have questions about AM6442 TRM.

Question 1:

TRM at Figure 12-1631, it is written to "3. Reset GPMC".

Which register should be reset?

Question 2:

TRM "5.4.5.7.1.3 PLL Programming Requirements"

What is the maximum frequency of the VCO?

I'd appreciate it if you could respond.

Best regards,

Rei

over 3 years ago

0 rei over 3 years ago

Mastermind 6155 points

Does anyone know?

0 JJD over 3 years ago in reply to rei

TI__Guru* 85890 points

You can check table 12-3359 for GPMC reset. You would need to use LPSC9 to reset the GPMC. You generally shouldn't have to reset the GPMC, as the reset is already performed upon device powerup.

PSC functions should be controlled using the DMSC APIs. These will ensure proper configuration of the PLLs.

Regards,

james

0 rei over 3 years ago in reply to JJD

Mastermind 6155 points

Hi James,

Thank you for your information. About the PLL programming,

My understanding is that USER don't need to set PLL(DMSC, DSC) because they are set in DMSC firmware. Is it correct?

I would like to know about VCO frequency and how to set it for PLL programming.

Best regards,

Rei

0 rei over 3 years ago in reply to JJD

Mastermind 6155 points

Hi James,

Customers are wondering, what is the frequency distributed to each peripheral. I think the VCO is controlled by the DMSC, but they would like to know the maximum frequency. DMSC FW is binary, so we can't confirm...

TRM "5.4.5.7.1.3 PLL Programming Requirements"

When will the AM64x clock tree tool be released?

Best regards,

Rei

0 JJD over 3 years ago in reply to rei

TI__Guru* 85890 points

Yes, the DMSC will control this, and will be set optimally by the firmware. There should be no reason to adjust this. I will have to find out about the CTT.

Regards,

James