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AM6442: Sysconfig UART setting

rei
Mastermind 6155 points
Part Number: AM6442

Hi TI experts,

My customers use SysConfigTool for AM64x pin config. They have a question about output source code.(AM64x_pinmux_data.c)

They set UART0. UART0_RXD is receive pin, however TX_DIS bit is 0 (Driver is enabled)
Is it correct?

AM64x_pinmux_data.c


AM64x_pinmux.h

I think that it should set PIN_OUTPUT_DISABLE.

Best regards,
Rei

  • 0
    TI__Mastermind 22893 points

    Hello Rei,

    The TX_DIS (PIN_OUTPUT_DISABLE) bit is set to 1 (TX Driver is disabled) by default on device reset. Therefore, no need to explicitly set this bit during the pinmux configuration.

    Best Regards,

    Zackary Fleenor

  • 0 in reply to Fleenor
    Mastermind 6155 points

    Hi Fleenor,

    Thank you for your reply. I understand the default 1, however PADMMR_PADCONFIG140 Register is set to 0x0005 0000.

    PIN_MODE(0) | ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
    is 0x0005 0000. (TX_DIS is 0)

    CSL_REG32_WR write 0x0005 0000 to regAddr(PADMMR_PADCONFIG140). In other words, TX_DIS bit is set to 0.

    Is it correct?

    Best regards,
    Rei

  • 0 in reply to rei
    TI__Mastermind 22893 points

    *3/10/2022 - Updating post to account for default register values after PORz

    Hey Rei,

    There is some simple Boolean logic that is used when configuring the set value.

    The key here is that we use the logical OR ( | ) to set the value's this means that if a bit is already set (default value), it will remain set since 1|0 =1.

    Original Value: 0x00200000NABLE) & (~PIN_PULL_DIRECTION)) = 0x00050000

    0000 0000 0010 0001 0100 0000 0000 0000

    0000 0000 0000 0101 0000 0000 0000 0000

    Logical OR =

    0000 0000 0010 0101 0100 0000 0000 0000

    Final Set Value = 0x00274000

    Regards.

    Zackary Fleenor

  • 0 in reply to Fleenor
    Mastermind 6155 points

    Hi Fleenor,

    Thank you for your reply. I understand the logical OR. It means that

    PIN_MODE(0) = 0000 0000 0010 0000 0000 0000 0000 0000

    Is it right? I was misunderstanding that

    PIN_MODE(0) = 0000 0000 0000 0000 0000 0000 0000 0000

    Best regards,

    Rei

  • +1 in reply to rei
    TI__Mastermind 22893 points

    Hello Rei,

    The PIN_MODE "function" is only concerned with setting the last 4 bits of the register:

    PIN_MODE(A) - xxxx xxxx xxxx xxxx xxxx xxxx xxxx AAAA

    The default value of the PADMMR_PADCONFIG register according to the TRM is:
    0x00214007h 

    0000 0000 0010 0001 0100 0000 0000 0111  = PIN_MODE(7) (GPIO mode) (Default)

     

    With this info we can infer the following sequence of register values upon setting PIN_MODE(0):

    0000 0000 0010 0001 0100 0000 0000 0111  - Original value after PORz reset

    xxxx  xxxx  xxxx  xxxx  xxxx  xxxx xxxx 0000  - PIN_MODE(0) set mask

    0000 0000 0010 0001 0100 0000 0000 0000 - Value of register after PIN_MODE(0)

    At this point the logical OR that was mentioned in previous post would be applied resulting in a final value:

    0000 0000 0010 0101 0100 0000 0000 0000

    Best Regards,

    Zackary Fleenor

  • 0 in reply to Fleenor
    Mastermind 6155 points

    Hi Fleenor,

    Thank you very much!