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[omap3530] using another NAND than PoP

David Bozec
Intellectual 400 points

Hi,

 

I have an omap3evm board with PoP NAND mapped on GPMC_CS0.

I'm trying to use an external NAND flash mapped on GPMC_CS1 through expansion port. I want to use only this new chip to write my x-loader, u-boot and kernel.

It works with my kernel, I can erase and write on it so there is no hardware issue, but I'm unable to see this new NAND chip with u-boot and x-load.

 

For u-boot, in drivers/mtd/nand/omap_gpmc.c:board_nand_init, I saw that u-boot only scans and latches on to the first CS with NAND type memory, so I modified cs=0 into cs=1 to scan after PoP NAND

in include/asm-arm/arch-omap3/cpu.h I added #define GPMC_CONFIG_CS1        0x90 (and I changed references to CS0 into CS1)

but when I try to boot my board I get this :

U-Boot 2009.11 (May 02 2011 - 14:26:53)

OMAP3430/3530-GP ES3.1, CPU-OPP2 L3-165MHz
OMAP3 EVM board + LPDDR/NAND
I2C:   ready
DRAM:  128 MB
NAND:  NAND: Unable to find NAND settings in GPMC Configuration - quitting
0 MiB

Seeing that, I thought that I had to modify x-loader too. So I did similar things in x-loader code :

#define GPMC_CONFIG_CS1        (OMAP34XX_GPMC_BASE+0x90) (and I changed references to CS0 into CS1)

But now I don't have anything on console.

 

I have explored a great part of code without finding anything.

Can somebody help me ?

 

Best Regards,

David.

 

  • 0
    TI__Genius 9190 points

    Hello David,

    you need to make sure you have changed the manufacture ID and device ID in xloader to match the external NAND.  You can find this in the memory datasheet. 

    To change these values you will need to edit the k9f1g08r0a.c in the x-loader drivers folder. 

  • 0 in reply to Jeff Culverhouse
    Intellectual 400 points

    Thanks Jeff,

    I didn't know there was this change to do, but it still doesn't work with the new ID

  • 0 in reply to David Bozec
    TI__Expert 6735 points

    David:

    It seems that much of the NAND code is hardcoded to use CS0.

    For example, in u-boot ./cpu/arm_cortexa8/omap3/mem.c, in gpmc_init()

    it assumes CS0:

     enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);

    The software definitely supports only one NAND device, so the change

    you made to skip CS0 in the scan is neccessary.

    The error message "NAND:  NAND: Unable to find NAND settings in GPMC Configuration"

    comes from the scan that checks the Device Type bits in the GPMC_CONFIG1 registers.

    Apparently it does not find this set to "NAND Device" at CS0 or CS1.

    The GPMC registers are initialized by x-loader.

    Regards,

    Michael T

    PS: Please mark this post as answered via the Verify Answer button below if you think it answers your question.  Thanks!

  • 0 in reply to Michael T
    Intellectual 400 points

    Thanks for your precisions Michael,


    I'm going to continue changing this hardcoded use of CS0 where I can find it.

    If someone else have clues, I'll be glad to have them.

  • 0 in reply to David Bozec
    Intellectual 400 points

    Can someone confirm that in GPMC_CONFIG7 register, CSVALID field is set to 0x0 for CS0 and to 0X1 for CS1 at boot or reset, but the use is the same after?

    I'm not sure in what way I have to understand this point of the datasheet.

     

    Thanks for your help.

  • 0 in reply to David Bozec
    TI__Expert 8180 points

    To get NAND working from u-boot you don't need to modify x-loader actually, from u-boot you can configure GPMC and NAND should work.

    Thanks,

    Vaibhav

  • 0 in reply to David Bozec
    TI__Expert 8180 points

    David,

    I guess you miss-typed reset values above, please refer to the TRM section 11.1.7.2.16 GPMC_CONFIG7_i, it is clearly mentioned that, Reset value is 0x1 for CS0 and 0x0 for CS1 to CS7. From usage point of view, I believe it should be same, except CS0 is boot media. One thing I am quite not sure and I have never tried and thought about it, whether and how u-boot can support 2 NAND devices.

    Also in your original mail you did mention that, from kernel you are able to access NAND over CS1, who is configuring GPMC there? Why can't you use exactly same configuration in u-boot and try?

    Thanks,

    Vaibhav

  • 0 in reply to Vaibhav Hiremath
    Intellectual 400 points

    Vaibhav,

     

    I'm not sure too that u-boot can support 2 NAND devices, but as long as I don't have a new board with only the external NAND, I still try.

    For the kernel, the only change I made is in arch/arm/mach-omap2/board-omap3evm.c:static void __init omap3_evm_init(void). I changed the call to board_nand_init() with chipselect 1 instead of  0 and it works.

    I can't do the same in u-boot because there is a lot of references to chipselect 0 and I have to change them.

     

    Regards,

    David.