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PROCESSOR-SDK-J721E: TDA4,RM,PM

Cherry Zhou
Mastermind 22235 points

Part Number: PROCESSOR-SDK-J721E

Hi team,

Here's an issue from the customer may need your help:

1)during debugging, a dead loop was observed when Sciclient_service was called to configure TISCI_MSG_BOARD_CONFIG_PM. Found that the bottom layer called the psc_drop_pwr_up_ref function (location: Sciclient/ssrc/rm_pm_hal/pm/drivers/psc/psc.c), where struct device *dev = psc_devs; the pointer obtained is 0xffffffff, which prevents the entire function from returning. Is there anything wrong?

2) They've done some attempts as follows, could you help check if it is reasonable:

If(dev==oxffffff) return;

Could you help check this case? Thanks.

Best Regards,

Cherry

  • 0
    TI__Guru*** 127021 points

    Hi Cherry, 

    Could you please provide some more detail on the issue:

    1) Which TI SDK is being used?

    2) Which Boot mode is being SPL vs. SBL

    3) Is EVM being used, or custom H/W?

    4) Has customer made any changes to S/W? IF so does backing out the S/W changes make issue go away.

    5) Is a JTAG debugger available such that customer can walk code to see where the invalid pointer is coming from.

    Thanks,

    kb

  • 0 in reply to KB
    TI__Mastermind 22235 points

    Hi KB,

    Thanks for your support.

    KB said:
    1) Which TI SDK is being used?

    7.03.00.07 is being used.

    KB said:
    2) Which Boot mode is being SPL vs. SBL

    SBL.

    KB said:
    3) Is EVM being used, or custom H/W?

    A custom H/W.

    KB said:
    4) Has customer made any changes to S/W? IF so does backing out the S/W changes make issue go away.

    No, no changes were made to the S/W, but some logs were appended to the output by printf.

    KB said:
    5) Is a JTAG debugger available such that customer can walk code to see where the invalid pointer is coming from.

    They don't have JATG, it's investigated by printf, and they found that the global variable "psc_devs" is the invalid pointer.

    Thanks and regards,

    Cherry

  • 0 in reply to Cherry Zhou
    TI__Mastermind 22235 points

    Hi,

    May I know is there any update?

    Thanks and regards,

    Cherry

  • 0 in reply to Cherry Zhou
    TI__Guru*** 127021 points

    Hi Cherry,

    Recommendation is to make use of a JTAG debugger and compare EVM boot flow to Customer H/W boot flow, to see where the issue is happening.   If JTAG is not available on Customer H/W, it can still be used on the EVM to follow the boot flow and compared to the prints from the Custom H/W.

    Review the Custom H/W vs the EVM.  Any board deltas would need to be accounted for S/W and may give a hint as to where failure is occurring.

    Are there any TI generated SBL logs and/or error logs on the MCU UART? 

    Additional SBL debug logging can be enabled by making below modification:

    File: ${PDK_PATH}/ packages/ti/boot/sbl/sbl_component.mk

         From: SBL_CFLAGS += -DSBL_LOG_LEVEL=2

             To: SBL_CFLAGS += -DSBL_LOG_LEVEL=3

    Regards,

    kb