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TLB Lock down register

Hello there!

I'm trying to get TLB lockdown to work. I have this small snippet:

mva = create_mva(paddr);
ldr = 0x1;
__asm__ volatile (
    "mcr p15,0,%[ldr],c10,c0,0      @Write D-TLB Lockdown Register\n"
    "mcr p15,0,%[mva],c8,c6,1       @Invalidate TLB entry\n"
    "mcr p15,0,%[mva],c10,c1,0      @Prefetch D-TLB\n"
    : // outs
    : [mva] "r" (mva), [ldr] "r" (ldr) // Ins
);

However, when above code is ran, the (custom) kernel panics:


====================== MMU DATA ABORT ====================
ERROR: The kernel tried to read from a faulty address
  Data Fault Status  = 0x00000805
  Data Fault Address = 0x81394000
  Fault instruction = 0x8000bb54
******************* kernel panic ***************

It seems it is caused by the instruction that writes D-TLB Lockdown register. Anyone got a clue why that is the case?

Thanks!