• State
  • Locked Locked
  • Replies 3 replies
  • Subscribers 101 subscribers
  • Views 294 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM3359: [AM3359]: Could not able to read multiple GPIO pin Value.

Amit Keshri
Prodigy 50 points
Part Number: AM3359

Hi Team,

I am trying to read 12 gpio pin i.e GPIO2_28, GPIO2_29,GPIO2_30, GPIO2_31,GPIO2_22,GPIO2_23,GPIO2_24,GPIO2_25, GPIO2_25, GPIO2_14,GPIO0_18, GPIO0_29 and GPIO3_13 pin of AM3359 processor.

From FPGA signal are coming to this above pins which is configured as input pin and mode is set as 7 for GPIO in dts file.

I am getting correct value(0x00000FFF),when i am reading FPGA register but when i am using below echo command i could not able to read GPIO value.

Please find the below logs for gpio read:

root@RCU:~# echo 86 > /sys/class/gpio/export
root@RCU:~# echo "in" /sys/class/gpio/gpio86/direction
in /sys/class/gpio/gpio86/direction
root@RCU:~# cat /sys/class/gpio/gpio86/value
0
root@RCU:~#
root@RCU:~# echo 87 > /sys/class/gpio/export
root@RCU:~# echo "in" /sys/class/gpio/gpio87/direction
in /sys/class/gpio/gpio87/direction
root@RCU:~# cat /sys/class/gpio/gpio87/value
0
root@RCU:~#
root@RCU:~# echo 88 > /sys/class/gpio/export
root@RCU:~# echo "in" /sys/class/gpio/gpio88/direction
in /sys/class/gpio/gpio88/direction
root@RCU:~# cat /sys/class/gpio/gpio88/value
0
root@RCU:~#
root@RCU:~# echo 89 > /sys/class/gpio/export
root@RCU:~# echo "in" /sys/class/gpio/gpio89/direction
in /sys/class/gpio/gpio89/direction
root@RCU:~# cat /sys/class/gpio/gpio89/value
0
root@RCU:~#
root@RCU:~# echo 78 > /sys/class/gpio/export
root@RCU:~# echo "in" /sys/class/gpio/gpio78/direction
in /sys/class/gpio/gpio78/direction
root@RCU:~# cat /sys/class/gpio/gpio78/value
1
root@RCU:~#
root@RCU:~# echo 18 > /sys/class/gpio/export
root@RCU:~# echo "in" /sys/class/gpio/gpio18/direction
in /sys/class/gpio/gpio18/direction
root@RCU:~# cat /sys/class/gpio/gpio18/value
0
root@RCU:~#
root@RCU:~# echo 89 > /sys/class/gpio/export
sh: write error: Device or resource busy
root@RCU:~# echo "in" /sys/class/gpio/gpio89/direction
in /sys/class/gpio/gpio89/direction
root@RCU:~# cat /sys/class/gpio/gpio89/value

0
root@RCU:~#

why i could not able to read gpio value ?.

what are the other method to read 12 gpio pins at a time ?.

Please help  me on this.

Regards,

Amit Kumar Keshri

  • 0
    TI__Guru** 124616 points

    Hi Amit,

    Please ensure you have set the pinmux of these pins correctly. You can use devmem2 utility to read the corresponding pad config registers of these pins to validate the pinmux settings.

  • 0 in reply to Bin Liu
    Prodigy 50 points

    Hi Bin Liu,

    Thank You for quick response.

    I am doing below highlighted dts configuration to read gpio.

    mygpio2_pins_default: mygpio2_pins_default {
    pinctrl-single,pins = <
    AM33XX_IOPAD(0x8f8, PIN_INPUT | MUX_MODE7) /* (G15) mmc0_dat1.gpio2[28] */
    AM33XX_IOPAD(0x8fc, PIN_INPUT | MUX_MODE7) /* (G16) mmc0_dat0.gpio2[29] */
    AM33XX_IOPAD(0x900, PIN_INPUT | MUX_MODE7) /* (G17) mmc0_clk.gpio2[30] */
    AM33XX_IOPAD(0x904, PIN_INPUT | MUX_MODE7) /* (G18) mmc0_cmd.gpio2[31] */
    >;
    };

    mygpmc1_pins_default: mygpmc1_pins_default {
    pinctrl-single,pins = <
    AM33XX_IOPAD(0x83c, PIN_INPUT | MUX_MODE0) /* (U13) gpmc_ad15.gpmc_ad15 */
    AM33XX_IOPAD(0x838, PIN_INPUT | MUX_MODE0) /* (V13) gpmc_ad14.gpmc_ad14 */
    AM33XX_IOPAD(0x834, PIN_INPUT | MUX_MODE0) /* (R12) gpmc_ad13.gpmc_ad13 */
    AM33XX_IOPAD(0x830, PIN_INPUT | MUX_MODE0) /* (T12) gpmc_ad12.gpmc_ad12 */
    AM33XX_IOPAD(0x82c, PIN_INPUT | MUX_MODE0) /* (U12) gpmc_ad11.gpmc_ad11 */
    AM33XX_IOPAD(0x828, PIN_INPUT | MUX_MODE0) /* (T11) gpmc_ad10.gpmc_ad10 */
    AM33XX_IOPAD(0x824, PIN_INPUT | MUX_MODE0) /* (T10) gpmc_ad9.gpmc_ad9 */
    AM33XX_IOPAD(0x820, PIN_INPUT | MUX_MODE0) /* (U10) gpmc_ad8.gpmc_ad8 */
    AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0) /* (T9) gpmc_ad7.gpmc_ad7 */
    AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0) /* (R9) gpmc_ad6.gpmc_ad6 */
    AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0) /* (V8) gpmc_ad5.gpmc_ad5 */
    AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0) /* (U8) gpmc_ad4.gpmc_ad4 */
    AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0) /* (T8) gpmc_ad3.gpmc_ad3 */
    AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0) /* (R8) gpmc_ad2.gpmc_ad2 */
    AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0) /* (V7) gpmc_ad1.gpmc_ad1 */
    AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0) /* (U7) gpmc_ad0.gpmc_ad0 */
    AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0) /* (T17) gpmc_wait0.gpmc_wait0 */
    AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* (V6) gpmc_csn0.gpmc_csn0 */
    AM33XX_IOPAD(0x880, PIN_INPUT | MUX_MODE1) /* (U9) gpmc_csn1.gpmc_clk */
    AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* (R7) gpmc_advn_ale.gpmc_advn_ale */
    AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* (T7) gpmc_oen_ren.gpmc_oen_ren */
    AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* (U6) gpmc_wen.gpmc_wen */
    AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* (T6) gpmc_be0n_cle.gpmc_be0n_cle */
    AM33XX_IOPAD(0x878, PIN_OUTPUT | MUX_MODE4) /* (U18) gpmc_be1n.gpmc_dir */

    AM33XX_IOPAD(0x88c, PIN_INPUT | MUX_MODE2) /* (V12) gpmc_clk.gpmc_wait1 */
    AM33XX_IOPAD(0x884, PIN_OUTPUT | MUX_MODE1) /* (V9) gpmc_csn2.gpmc_be1n */
    AM33XX_IOPAD(0x888, PIN_OUTPUT | MUX_MODE0) /* (T13) gpmc_csn3.gpmc_csn3 */
    AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE2) /* (U17) gpmc_wpn.gpmc_csn5 */
    AM33XX_IOPAD(0x9b0, PIN_INPUT | MUX_MODE7) /* (A15) xdma_event_intr0.clkout1 Updating for intr0*/

    /* Location ID bits 10, 11, 12 */
    AM33XX_IOPAD(0xA1C, PIN_INPUT| MUX_MODE7) /* (F16) USB0_DRVVBUS.GPIO0_18*/
    AM33XX_IOPAD(0xA34, PIN_INPUT| MUX_MODE7) /* (F15) USB1_DRVVBUS.GPIO3_13 */
    AM33XX_IOPAD(0x944, PIN_INPUT| MUX_MODE7) /* (H18) USB1_DRVVBUS.GPIO0_29 */
    >;
    };

    mylcdc4_pins_default: mylcdc4_pins_default {
    pinctrl-single,pins = <
    AM33XX_IOPAD(0x8e0, PIN_INPUT | MUX_MODE7) /* (U5) lcd_vsync.lcd_vsync */
    AM33XX_IOPAD(0x8e4, PIN_INPUT | MUX_MODE7) /* (R5) lcd_hsync.lcd_hsync */
    AM33XX_IOPAD(0x8e8, PIN_INPUT | MUX_MODE7) /* (V5) lcd_pclk.lcd_pclk */
    AM33XX_IOPAD(0x8ec, PIN_INPUT | MUX_MODE7) /* (R6) lcd_ac_bias_en.lcd_ac_bias_en */
    AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* (R1) lcd_data0.lcd_data0 */
    AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* (R2) lcd_data1.lcd_data1 */
    AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* (R3) lcd_data2.lcd_data2 */
    AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* (R4) lcd_data3.lcd_data3 */
    AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* (T1) lcd_data4.lcd_data4 */
    AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* (T2) lcd_data5.lcd_data5 */
    AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* (T3) lcd_data6.lcd_data6 */
    AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* (T4) lcd_data7.lcd_data7 */
    AM33XX_IOPAD(0x8c0, PIN_INPUT | MUX_MODE7)  /* (U1) lcd_data8.lcd_data8 */
    AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* (U2) lcd_data9.lcd_data9 */
    AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* (U3) lcd_data10.lcd_data10 */
    AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* (U4) lcd_data11.lcd_data11 */
    AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* (V2) lcd_data12.lcd_data12 */
    AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* (V3) lcd_data13.lcd_data13 */
    AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* (V4) lcd_data14.lcd_data14 */
    AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* (T5) lcd_data15.lcd_data15 */
    >;
    };

    Please tell me where i am doing wrong?.

    Regards,

    Amit Kumar Keshri

  • 0 in reply to Amit Keshri
    TI__Guru** 124616 points

    Hi Amit,

    Did you use the Pinmux tool to validate these pinmux changes?

    You can use devmem2 utility to read the corresponding padcfg registers to check if the pinmux has been set correctly.