Where to put shared memory in the C6a816x?

Lee Holeva

I have the C6a816/AM389x Integra EVM and in considering both the memory map given by the EZSDK FAQ:

http://processors.wiki.ti.com/images/e/eb/Ez_sdk_memory_map.PNG

and that given by evmTI816x.platform in XDCTOOLS, I am wondering where to put memory regions shared by both the ARM and the DSP. The memory map diagram in the FAQ suggests using space after 0x90000000, requiring the definition of a new segment in evmTI816x.platform. Is this correct?

Lee Holeva

over 14 years ago

0 MarcPyne over 14 years ago

TI__Mastermind 25055 points

Lee,

We are looking into this and will get back with you as soon as we can.

Regards,
Marc

0 Velan over 14 years ago in reply to MarcPyne

TI__Intellectual 2785 points

Lee,

I hope you want to change the memory section SR1 as mentioned in the memory map diagram in FAQ, which is what is shared between ARM & DSP.

To change you need to update the file (in case of c6accel application) ./soc/packages/ti/c6accel_unitservers/TI816X/serverplatforms.xs the below lines and all other sections appropriately.

           ["DDR3_SR1", {
                comment: "DDR3 Memory reserved for use by SharedRegion 1",
                name: "DDR3_SR1",
                base: 0x8D000000,
                len: 0x00C00000    /* 12 MB (Reserved)*/
            }],

Could you also let us know your goal in this experiment, as i am not sure why you want to change this section but not others.

Best Regards

Velan

0 Lee Holeva over 14 years ago in reply to Velan

Genius 4615 points

Velan said:
Could you also let us know your goal in this experiment, as i am not sure why you want to change this section but not others.

Actually, I may want to change all the sections to take advantage of the 1GB of DDR. I'm still in getting-to-know mode and for now I'm using the Platform.xdc file that had been included with the Syslink samples:

metaonly module Platform inherits xdc.platform.IPlatform {

    config ti.platforms.generic.Platform.Instance plat =
        ti.platforms.generic.Platform.create("plat", {
            clockRate:      800.0,
            catalogName:    "ti.catalog.c6000",
            deviceName:     "TMS320TI816X",
            externalMemoryMap: [
                ["EXT_RAM",
                    {name: "EXT_RAM",     base: 0x80000000, len: 0x0A600000, space: "code/data",access: "RWX"}],
                ["DDR2",
                    {name: "DDR2",        base: 0x8B000000, len: 0x02000000, space: "code/data",access: "RWX"}],
                ["SHARED",
                    {name: "SHARED",      base: 0x8E000000, len: 0x01000000, space: "code/data",access: "RWX"}],
                ["APPLICATION",
                    {name: "APPLICATION", base: 0x8D000000, len: 0x00C00000, space: "code/data",access: "RWX"}],
            ],
            l1DMode:"32k",
            l1PMode:"32k",
            l2Mode:"256k",
    });

instance :

    override config string codeMemory = "DDR2";
    override config string dataMemory = "DDR2";
    override config string stackMemory = "DDR2";

}

Lee Holeva

Processors

Processors forum

Where to put shared memory in the C6a816x?