AM3505: Clarification of am35X Technical Reference manual

Paul

The data will be sample on the opposite edge. However, I am checking to see on which edge the data is captured when not inverted. 

--Paul 

Sorry to be dense but I could use a clarification of what sample on the opposite edge means.

PaulM thanks for you attention to this item

If the VPFE uses the falling edge of PLCLK to capture the data, then setting  vpfe_pclk_invert_en would mean that the VPFE would then using the rising edge of PCLK to capture the data, ie the opposite edge.  What I don't know yet is which edge of PCLK the VPFE natively uses to capture the data.

--Paul

Paul

I was unable to find a definitive answer. However, I did find the following statement relating to the vpfe_pclk_invert_en bit:

"There is an option of inverting this clock internally to support sensors which launches data on negative clock edge"

This implies that when vpfe_pclk_invert_en is "0", the IP expects the sensor to launch data on the rising clock edge and be captured, by the IP, using the falling clock edge. Therefore, setting vpfe_pclk_invert_en = "1", to invert PCLK (internally),  would then mean that the data is captured on the rising edge of the external PCLK.

--Paul 

Thanks so much for your help.   Where was this statement found.   Did I miss it in the technical reference manual or datasheet?  Would it be possible to get the document that it was found in?

Again thanks for your help.

Paul

The statement was in an internal design spec..

  Paul