Have anybody sucessfully used timer4 on the DM365 and can confirm its operation?

Please be sure that the ARM system interrupt are configured properly:

Refer to http://focus.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=sprufg5a&fileType=pdf

 section  9.12 System Control Registers (see register description for offset 0x18 ARM_INTMUX).

Be sure that bit 12 (INT38) is set to 1 enabling Timer 4.

hi, Jinh.

since i have seen many post of you, i just want to ask if you dont mind to post any code snippets here about the timer

regards, mike.

Hi Mike,

here are the basics:

{

from irqk module where I hacked it in:

static int timer4_irq_num = 38; //hijn-buz for timer4

//hijn-timer stuff

#define DAVINCI_TIMER3_BASE 0x01C20800

unsigned int* uip_timer3_TCR = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER3_BASE + 0x20);

unsigned int* uip_timer3_TGCR = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER3_BASE + 0x24);

unsigned int* uip_timer3_PRD12 = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER3_BASE + 0x18);

unsigned int* uip_timer3_PRD34 = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER3_BASE + 0x1C);

unsigned int* uip_timer3_TIM12 = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER3_BASE + 0x10);

unsigned int* uip_timer3_TIM34 = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER3_BASE + 0x14);

unsigned int* uip_timer3_REL12 = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER3_BASE + 0x34);

unsigned int* uip_timer3_REL34 = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER3_BASE + 0x38);

unsigned int* uip_timer3_INTCTL_STAT = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER3_BASE + 0x44);

//hijn-buz : setup timer 4 for a 1kHz interrupt to sound the buzzer

#define DAVINCI_TIMER4_BASE 0x01C23800

unsigned int* uip_timer4_TCR = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER4_BASE + 0x20);

unsigned int* uip_timer4_TGCR = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER4_BASE + 0x24);

unsigned int* uip_timer4_PRD12 = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER4_BASE + 0x18);

unsigned int* uip_timer4_PRD34 = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER4_BASE + 0x1C);

unsigned int* uip_timer4_TIM12 = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER4_BASE + 0x10);

unsigned int* uip_timer4_TIM34 = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER4_BASE + 0x14);

unsigned int* uip_timer4_REL12 = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER4_BASE + 0x34);

unsigned int* uip_timer4_REL34 = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER4_BASE + 0x38);

unsigned int* uip_timer4_INTCTL_STAT = (volatile unsigned int*)(IO_OFFSET + DAVINCI_TIMER4_BASE + 0x44);

static irqreturn_t timer4_12_irq_handler(int irq, void *dev_id, struct pt_regs *regs)

{

if (timer4_12_irq_counter > 47){

timer4_12_irq_counter = 0;

}

*uip_VoiceCodec_WFIFO = sinetable[(short)timer4_12_irq_counter]; // Write Data // VC_WFIFO = sinetable[(short)timer4_12_irq_counter];

timer4_12_irq_counter++;

return IRQ_HANDLED;

}

void timer4_12_request_irq(int irq_num) //hijn-buz

{

int status = 0;

unsigned char val;

status = request_irq(irq_num, timer4_12_irq_handler, SA_INTERRUPT, "tmr4_test", NULL);

if (status < 0) {

printk("<1> timer4_12_request_irq : Failed to Register IRQ %d \n", irq_num);

}

else {

printk("<1> timer4_12_request_irq : Return status is %d \n", status);

}

}

irqk init do:

/* Configure interrupt mux */

muxval = davinci_readl(DM365_ARM_INTMUX);

muxval |= 0x00001000; /* set bit12 for timer4:TINT8 interrupt */

davinci_writel(muxval, DM365_ARM_INTMUX);

*uip_timer4_PRD12 = 0x0000029A; //Select timer period with PRD12 and PRD34 - for 1.5kHz int

*uip_timer4_PRD34 = 0x00000000;

*uip_timer4_TCR |= 0x00800080; //Enable timer with ENAMODE12 in TCR

*uip_timer4_INTCTL_STAT |= 0x00010001; //hijn-buz : enable interrupt generation by timer4

timer4_12_request_irq(timer4_irq_num); //hijn-buz - timer4 on tint8 : 38; request timer3 on tint12 : 15

and when you exit the module do:

timer4_12_unrequest_irq(timer4_irq_num); //hijn-buz 38 for timer 4, 15 for timer 3

in runtime to enable the timer4 do: (in ioctl function)

*uip_timer4_TGCR |= 0x03; //Remove timer from reset with TIM12RS and TIM34RS in TGCR - set bits 0,1

in runtime to stop the timer do: (in ioctl function)

*uip_timer4_TGCR &= 0xfffffffC; //Reset timer

*uip_timer4_TIM12 = 0; //clear timer registers

If you need more connect as a friend and I will get it or more to you via email.  I always struggle with the formatting on the forum page.  (Don't show the code to your mentor)

Jinh T.

hi,Jinh.

thanks a lot.

i agree with you that the code you post above is amost the same as me.

i dont konw what's wrong.

do you using this sample code on dm365 ? which version are you using regarding to the software ?

regards, Mike

Hi Mike,

I hacked irqk.c to use as module to do IO and timer stuff and used fbdev_loopback as core for my evaluation changes.  I use standard PAL and did code changes to have it hard-coded and changed a driver to enable it to "see" black and white video coming in.  Most changes in fbdev_loopback from PSP_02_10_00_14 that does my app.  I am using evaluation dvsdk_2_10_01_18.   Being sort of a demonstrator the code is not very clean also but it works for now.  The stuff I posted is all I have on the timer4 which is similar to timer3 but timer3 I am using in counter mode which is the only difference.  In my struggles I had at a time timer3 doing what timer4 is now doing and that was working fine.

Jinh T.

hi.Jinh.

thanks.

i have just left for sports..sorry.

i'm using dvsdk 4 with psp03.01.01.38 and the kernel of linux-2.6.32.17. maybe that is the problem..

i will confirm with the FAE we get form ti.. and feed you back if any updates.

BTW, you post above is too deep for me to understand cus im new to the hardware stuff...;)

i will read you post more and try to understand what's you are doing...

(PS: should i do hack the  irqk.c to do something like PWM ?   i need to generate 1KHz frequncy from GPIO pins like pwm. that's why i need to use the hardware timer.  the PINs in our custom borad with PWM function just work in the other way. )

regards, Mike.

hi, Jinh.
Sorry ! my mistake!

i have found the problem which comes form my code.

it's something mising there.

if you want to see the reason, please go check the post here.

regards, Mike

Hi Mike, glad you found the fault and got the problem sorted out.

Regards, Hijn.