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OMAP3530 CCDC Always Busy

Andrew Poole
Intellectual 570 points
Other Parts Discussed in Thread: SYSCONFIG

We are currently trying to run the ISP in SYNC mode and can successfully see that the HS VS syncs appear correct.  We are finding that the CCDC becomes 'busy' and then remains in that state, which can be seen from reading the CCDC_PCR register bit 1 (BUSY).

What are the exact conditions for this bit being set and unset (e.g. is it set at the beginning of the field and unset after a certain number of h-syncs/pixels)?

 

Andy

  • 0
    TI__Intellectual 1665 points

    Hello Andrew,

    CCDC busy error generally occur when CCDC block is expecting a certain frame size or rather a certain number of VS/HS pulses and that is not met. This could happen when the sensor configuration and CCDC register configuration is not aligned. Please validate the data width and the HORZ and VERT values in the CCDC registers.

    Please use these register settings as a reference. Here CCDC is configured to capture 8-bit, 8bpp (bits per pixel), 1280x1024, RAW data to memory. Primarily focus on the CCDC_SYN_MODE for datasz configuration and CCDC_HORZ_INFO, CCDC_VERT_LINES, CCDC_FMT_HORZ and CCDC_FMT_VERT to configure the image size.

    CCDC_PID: 0x480BC600
    1FE01
    CCDC_PCR: 0x480BC604
    3
    CCDC_SYN_MODE: 0x480BC608
    30F0C
    CCDC_HD_VD_WID: 0x480BC60C
    0
    CCDC_PIX_LINES: 0x480BC610
    0
    CCDC_HORZ_INFO: 0x480BC614
    4FF
    CCDC_VERT_START: 0x480BC618
    0
    CCDC_VERT_LINES: 0x480BC61C
    3FF
    CCDC_CULLING: 0x480BC620
    FFFF00FF
    CCDC_HSIZE_OFF: 0x480BC624
    500
    CCDC_SDOFST: 0x480BC628
    0
    CCDC_SDR_ADDR: 0x480BC62C
    283000
    CCDC_CLAMP: 0x480BC630
    10
    CCDC_DCSUB: 0x480BC634
    0
    CCDC_COLPTN: 0x480BC63
    BB11BB11
    CCDC_BLKCMP: 0x480BC63C
    0
    CCDC_FPC: 0x480BC640
    0
    CCDC_FPC_ADDR: 0x480BC644
    0
    CCDC_VDINT: 0x480BC648
    3FE02AA
    CCDC_ALAW: 0x480BC64C
    4
    CCDC_REC: 0x480BC650
    0
    CCDC_CFG: 0x480BC65
    8000
    CCDC_FMTCFG: 0x480BC658
    E000
    CCDC_FMT_HORZ: 0x480BC65C
    500
    CCDC_FMT_VERT: 0x480BC660
    400
    CCDC_PRGEVEN0: 0x480BC684
    0
    CCDC_PRGEVEN1: 0x480BC688
    0
    CCDC_PRGODD0: 0x480BC68C
    0
    CCDC_PRGODD1: 0x480BC690
    0
    CCDC_VP_OUT: 0x480BC694
    7FE5000
    CCDC_LSC_CONFIG: 0x480BC698
    6600
    CCDC_LSC_INITIAL: 0x480BC69C
    0
    CCDC_LSC_TABLE_BA: 0x480BC6A0
    0
    CCDC_LSC_TABLE_OF: 0x480BC6A4
    0
    ISP Registers
    ISP_SYSCONFIG: 0x480BC004
    2000
    ISP_SYSSTATUS: 0x480BC008
    1
    ISP_IRQ0ENABLE: 0x480BC00C
    811B33F9
    ISP_IRQ0STATUS: 0x480BC010
    0
    ISP_IRQ1ENABLE: 0x480BC014
    0
    ISP_IRQ1STATUS: 0x480BC018
    80000300
    ISP_CTRL: 0x480BC040
    29C110

    Regards, Punya

  • 0 in reply to Punya Prakash
    Prodigy 10 points

    Hello Punya, 

    We are facing a similar problem where CCDC is always busy. I'm providing the details as follows:

    a) We are using the mode that directly writes data into the memory as it is a smart-sensor. It will provide YUV422 of proper size for preview and JPEG for capture. 

    b) When we try to run a CCDC stop, it results in a timeout. The time-out is seen each time there is a mode change preview->capture and back as the CCDC stop is called. 

    c) Although the CCDC is permanently busy, the HS_VS and VD0 interrupts are received correctly

     

    The time-out per se is not causing a problem, but we are facing a secondary issue that we suspect is related. We find that every once in a while the frame sent to the camera in preview mode is not updated with the latest image. This results in a jitter in preview as the offending frame is out of sequence (as it didn't get updated). This is especially seen in the first few moments of the preview right after a capture. 

    We have the following questions:

    a) It is plausible that the CCDC being busy is the reason we see occasional jitter in preview? 

    b) What could be keeping the CCDC busy in our case? We reviewed your inputs from the earlier reply, but many of the registers are don't-cares in our case as we bypass the data formatter. Can you provide any suggestions on how to diagnose the issue so that CCDC stop happens as expected?

     

    Regards, 

    Shridhar