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TDA3MV: Display Subsystem Parallel Interface---720x480i(or 720*576i) Standard-definition output

Cherry Zhou
Mastermind 22235 points
Part Number: TDA3MV

Hi team,

Here's an issue from the customer may need your help:

In the spec of TDA3, here're two types of image output: [9.1.1.1 Display Subsystem Parallel Interface], [9.1.1.2 Display Subsystem TV Output].

The customer has designed a PCBA, the output of this PCBA is given in 720p RGB24 image format via [9.1.1.1 Display Subsystem Parallel Interface]. To the next IC, which is a high-definition DAC that can be used for normal output-class high-definition images:

With the same hardware design, can 720x480i (or 720*576i) be given through the [9.1.1.1 Display Subsystem Parallel Interface] to the later IC for the DAC to be scaled? If the hardware design is OK, can this be used in the SDK software firmware portion as well?

Could you help check this case? Thanks.

Best Regards,

Cherry

  • 0
    TI__Guru**** 476445 points

    Hi Cherry,

    I think this can be supported. The SW already supports NTSC and PAL resolutions on the DAC output, so similar configuration needs to be set for the DPI output. 

    But please note that the limitation of hsync width, if i remember correctly, it is 8bit, so hsync width cannot be more than 256 clock cycles. Typically NTSC/PAL resolution requires higher hsync width..

    Regards,

    Brijesh