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TDA4VM: Draw2D

Part Number: TDA4VM

Hi,TI

I have a few questions about Draw2D, please enlighten me.Let's take the test program under vision_apps/apps/dl_demos/app_tidl as an example.

My question is as follows:

1.Which CPU does this test program run on by default, A72 or R5?

2.How to get this test program to run on other CPUs

Thanks

  • Hi,

    1. As A72 is the Host for the OpenVX, the application runs on the A72 and the nodes in the application will run on the respective targets that are assigned to the node
        For eg. TIDL node runs on C7x, display node runs on R5 etc.

    2. Are you trying to run the demo application itself on other CPU or the nodes present in it?

    Regards,
    Nikhil

  • OK,thank you very much.There is another phenomenon that confuses me.

    When I turned on the debug log of IPC and ran this test program, I found that IPC kept printing the following log:

    53.212103 s: IPC: TX: mpu1_0 -> c7x_1 (port 13) msg = 0x00000080
    [C7x_1 ] 53.212179 s: IPC: RX: mpu1_0 (port 1024) -> C7X_1 (port 13) msg = 0x00000080
    53.239545 s: read payload :576
    53.239569 s: IPC: RX: c7x_1 -> mpu1_0 (port 1024) msg = 0x00000240
    53.239985 s: IPC: TX: mpu1_0 -> mcu2_0 (port 13) msg = 0x0000118a
    [MCU2_0] 53.240063 s: IPC: RX: mpu1_0 (port 1025) -> mcu2_0 (port 13) msg = 0x0000118a
    [C7x_1 ] 53.239420 s: VX_ZONE_WARNING:[tivxKernelTIDLCreate:615] All Interrupts DISABLED during TIDL process
    [C7x_1 ] 53.239443 s: IPC: TX: C7X_1 (port 13) -> mpu1_0 (port 1024) msg = 0x00000240
    53.243628 s: read payload :4672
    53.243635 s: IPC: RX: mcu2_0 -> mpu1_0 (port 1025) msg = 0x00001240
    [MCU2_0] 53.243515 s: IPC: TX: mcu2_0 (port 13) -> mpu1_0 (port 1025) msg = 0x00001240
    53.373473 s: IPC: TX: mpu1_0 -> c7x_1 (port 13) msg = 0x0000d080
    53.376234 s: read payload :62016
    53.376244 s: IPC: RX: c7x_1 -> mpu1_0 (port 1024) msg = 0x0000f240
    [C7x_1 ] 53.373541 s: IPC: RX: mpu1_0 (port 1024) -> C7X_1 (port 13) msg = 0x0000d080
    [C7x_1 ] 53.376155 s: IPC: TX: C7X_1 (port 13) -> mpu1_0 (port 1024) msg = 0x0000f240
    53.396390 s: IPC: TX: mpu1_0 -> mcu2_0 (port 13) msg = 0x0000e18a
    [MCU2_0] 53.396475 s: IPC: RX: mpu1_0 (port 1025) -> mcu2_0 (port 13) msg = 0x0000e18a
    53.435272 s: read payload :74304
    53.435281 s: IPC: RX: mcu2_0 -> mpu1_0 (port 1025) msg = 0x00012240
    [MCU2_0] 53.435147 s: IPC: TX: mcu2_0 (port 13) -> mpu1_0 (port 1025) msg = 0x00012240
    54.371990 s: IPC: TX: mpu1_0 -> c7x_1 (port 13) msg = 0x0000d080
    54.374765 s: read payload :62016
    54.374773 s: IPC: RX: c7x_1 -> mpu1_0 (port 1024) msg = 0x0000f240
    [C7x_1 ] 54.372073 s: IPC: RX: mpu1_0 (port 1024) -> C7X_1 (port 13) msg = 0x0000d080
    [C7x_1 ] 54.374681 s: IPC: TX: C7X_1 (port 13) -> mpu1_0 (port 1024) msg = 0x0000f240
    54.387057 s: IPC: TX: mpu1_0 -> mcu2_0 (port 13) msg = 0x0000e18a
    [MCU2_0] 54.387143 s: IPC: RX: mpu1_0 (port 1025) -> mcu2_0 (port 13) msg = 0x0000e18a
    54.434498 s: read payload :74304
    54.434507 s: IPC: RX: mcu2_0 -> mpu1_0 (port 1025) msg = 0x00012240
    [MCU2_0] 54.434367 s: IPC: TX: mcu2_0 (port 13) -> mpu1_0 (port 1025) ms

    ......

    I have 2 questions about this log:

    1.Why mpu1_0 chooses to communicate with MCU2_0 and C7x_1, but not with other CPUs.

    2.Most of the communication data are the same numbers, what is the meaning of these communication data?

    Thanks

  • Hi,

    1. Since this testcase has only 2 nodes i.e. TIDL on C7x and display node on MCU2_0, and the application is running on MPU1_0, so the IPC communication happens only from application to nodes which are in the respective CPUs.
    If you add any node in this test case that runs with a target on other CPUs like C66x etc, then MPU1_0 will communicate with that too.

    2. You would see the same numbers only in a TX RX pair. These numbers are the payload/information sent from A72 to the respective CPUs in order to call either the node's create or process or delete functions. 

    Regards,
    Nikhil

  • OK.sorry to bother you

    I want to be clear .If I use the demo of vision apps/apps/dl_demos/app_tidl to develop my own Display APP (such as adding a rectangle, etc.), then I only need to change the source code of main.c. Are there other corresponding modifications on RTOS (like MCU2_0, C7x_1)?

    Thanks.

  • Hi,

    Could you please elaborate on your own Display app?
    Are you still going to use the display node provided in the OpenVX or are you creating a custom kernel (or new node) in order to display?

    No worries, always happy to assist you Slight smile

    Regards,
    Nikhil

  • Thank you very much.

    I just want to make a Display APP that can display text and pictures. The simpler the implementation, the better. This demo display interface setting is in the app_init function of main.c, I actually hope to only change this function. However, this example involves IPC. I am afraid that after modifying the app_init function, other modifications need to be made accordingly. So ask if you need to make changes on the RTOS.

    Sincerely

  • Hi,

    Currently the display driver is running on R5F. So if you want to access display on linux then OpenVX display node is the only way. You could configure the display parameters in the main function of the application itself (i.e. set the parameters of display node right before creating it in your display application itself). The contents in app_init() are mostly DSS driver initializations.

    Regards,
    Nikhil

  • OK.thanks for your answers and guidance.

    In fact, what I want to confirm is whether the process of IPC communication will involve changes to the code on the R5 side. I don't change its existing architecture, only change the displayed content. In this case, do I need to change the code on the R5 side?

    Sincerely

  • Yes, If the display node is used in the application code on A72 to display the contents then there is no need to change the existing architecture / code on the R5 side.

    Regards,
    Nikhil

  • Thanks.

    Let me try to ask, this demo involves deep learning, but I just want to draw the interface without using deep learning. In this case, what should I modify, please advise.

    Sincerely

  • Hi,

    I recommend you to make new simple application and follow the procedure of the Draw2D from the tidl demo as Draw2D just requires a buffer to draw into.
    This filled buffer can be sent to the display node in order to display it.

    Regards,
    Nikhil

  • Hi Nikhil,

        Nikhil said:

        For eg. TIDL node runs on C7x, display node runs on R5 etc.

    I have a question.How to specify a node to bind to the specified CPU core?

    Regards,
    Ding

  • Hi Ding,

    We could use vxSetNodeTarget() api to specify a node to bind to specific CPU.

    For eg. vxSetNodeTarget(node, (vx_enum)VX_TARGET_STRING, TIVX_TARGET_DSP1);  binds this node to run on target C66_1.

    Regards,
    Nikhil

  • Hi Nikhil,

    Thank you for your reply. But I have a few questions, I hope to get your support.

    1. Is DSS driver dedicated to r5f? Is there a DSS driver on A72? Can I use the DRM driver on Linux to drive the display?

    2. If I want to realize the GUI app, is there any other method besides draw2d?

    Regards,
    Ding
  • Hi Ding,

    1. Yes, DSS driver is dedicated to R5F, Once in OpenVX we cannot use driver from Linux.

    2. Please refer the below FAQ, this will answer your query
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/950630/faq-processor-sdk-dra8x-tda4x-psdkra-can-i-use-qt-wayland-to-render-visionapp-result


    Regards,
    Nikhil

  • Hi Nikhil,

    Thank you for your reply.

    I'll try it according to the link above. In addition, I want to confirm whether QT & Wayland has been integrated into the tda4vm SDK given by TI,
    No need for additional integration?

    Regards,
    Ding

  • Hi Ding,

    QT and Wayland are currently not integrated into the SDK. You would have to integrate this and after integration, follow the steps provided in the FAQ above.

    Thanks and Regards,
    Nikhil

  • Hi Nikhil,

    Thank you very much for your patience. Is there any reference example or FAQ for integrating QT/Wayland on tda4vm platform? I would appreciate it if you could provide it.

    In addition, our display is connected to r5f through DSI. In this case, how is the render buffer shared from A72 to r5f? Based on this, do we need to do any special treatment when integrating QT / Wayland?

    Regards,
    Ding

  • Hi Ding,

    We can't use QT/Wayland framework with Display on R5F.
    The Display should be connected on A72 in order to use QT/Wayland.

    Regards,
    Nikhil

  • Hi Nikhil,

    I'm glad to receive your reply. According to your opinion, if the Display is connected through DSI, we can only use draw2d for UI display. Do I understand correctly?

    Then Let's discuss another case. If the screen is connected to A72, Is there any reference example or FAQ for integrating QT/Wayland on tda4vm platform? I would appreciate it if you could provide it.

    Regards,
    Ding

  • Hi Ding,

    The below link to the FAQ explains exactly how we can integrate/enable QT/wayland with OpenVX.. But limitation is, DSS on Linux does not support DSI output.

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/950630/faq-processor-sdk-dra8x-tda4x-psdkra-can-i-use-qt-wayland-to-render-visionapp-result

    Regards,

    Brijesh

  • Hi Nikhil,

    I see. Thank you very much. I'll try it first according to the following link. If I have any problems, I'll ask you later.

    Regards,
    Ding