From TMS320C674x DSP CPU and Instruction Set Reference Guide, SPRUFE8B, July 2010:
5.6.2 Nested Interrupts
To allow nested interrupts, the interrupt service routine must perform the following initial steps in
addition to its normal work of saving any registers (including control registers) that it modifies:
1. The contents of IRP (or NRP) must be saved
2. The contents of the PGIE bit must be saved
3. The contents of ITSR must be saved
4. The GIE bit must be set to 1
Prior to returning from the interrupt service routine, the code must restore follows:
1. The GIE bit must be first cleared to 0
2. The PGIE bit saved value must be restored
3. The contents of ITSR must be restored
4. The IRP (or NRP) saved value must be restored
According to the following sections:
2.8.4 Control Status Register (CSR)
2.9.9 Interrupt Task State Register (ITSR)
the GIE bit in ITSR is physically the same bit as the PGIE bit in CSR.
Is there any risk to only perform the following steps on entry:
1. The contents of IRP (or NRP) must be saved
3. The contents of ITSR must be saved
4. The GIE bit must be set to 1
and only the following steps before exit?
1. The GIE bit must be first cleared to 0
3. The contents of ITSR must be restored
4. The IRP (or NRP) saved value must be restored
