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TDA4VM: where's the definition of interrupt number?

Veitch Kyrie
Intellectual 500 points
Part Number: TDA4VM

Hi TI，

I’d like to know the interrupt number of GPIO pins, for example, how to get the interrupt number of GPIO0_43(AF28) in A72(linux) main domain? is there a definition? something like irq.h? thanks

  • 0
    TI__Guru* 80155 points

    Hi Veitch,

    Are you looking for the definition to add in dts node, or are you looking to find the Linux irq number?

    The Linux IRQ numbers (the id you get from platform_get_irq) are software IRQ numbers assigned by Linux kernel based on all the interrupt controller chips registered in the system.  

    regards

    Suman

  • 0 in reply to Suman Anna
    Intellectual 500 points

    Hi Suman,

    Thansk for your reply, actually, I am confused about the IRQ number in linux, as you can see in below, for example, it denotes the SPI IRQ number is 29 in linux, regarding to 216 in TRM(which should be 216-32=184 in dts), I can understand why it need to minus 32 in dts, but I'd like to know the mapping relationship of these two number(29 & 216), could you help to clarify? thanks again.

    root@j7-evm:~# cat /proc/interrupts
           CPU0       CPU1
 11:       2908       5426     GICv3  30 Level     arch_timer
 14:          0          0     GICv3  23 Level     arm-pmu
 16:          0          0     GICv3 928 Level     42120000.i2c
 21:        715          0     GICv3  69 Level     32c00000.mailbox thr_011
 22:          0          0     GICv3 804 Edge      arm-smmu-v3-evtq
 23:          0          0     GICv3 800 Edge      arm-smmu-v3-gerror
 24:        347          0     GICv3 224 Level     2800000.serial
 26:       1177          0     GICv3  35 Level     mmc0
 27:        222          0     GICv3  36 Level     mmc1
 28:          0          0     GICv3 233 Level     2010000.i2c
 29:          0          0     GICv3 216 Level     2100000.spi
 51:          0          0  MSI-INTA 13828536 Level     31150000.dma-controller chan0
 52:          0          0  MSI-INTA 13828537 Level     31150000.dma-controller chan1
 53:          0          0  MSI-INTA 13828538 Level     31150000.dma-controller chan2
201:          0          0      INTR 391 Level     310d0000.cpts
215:          0          0      GPIO   7 Edge    -davinci_gpio  GPIO Key USER2
300:          0          0      GPIO   0 Edge    -davinci_gpio  GPIO Key USER1
467:          4          0      INTR 436 Level     mbox-mcu-r5fss0-core0
468:         13          0      INTR 432 Level     mbox-main-r5fss0-core0, mbox-main-r5fss0-core1
470:          8          0      INTR 424 Level     mbox-c66-0, mbox-c66-1
471:          4          0      INTR 420 Level     mbox-c71-0

    IRQ in TRM:

    GIC500_SPI_IN_216 216 MCSPI0_INTR_SPI_0
  • 0 in reply to Veitch Kyrie
    TI__Mastermind 24540 points

    Hi Veitch,

    Sorry for the long delay.

    IRQ 216 is the hw irq where as  29 is the logical irq allocated by the linux ,as there can be multiple interrupt controller having same hw intr number.

    so in order to avoid overlapping of the interrupt no linux allocate logical interrupt no.

    Regards
    Diwakar