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AM5708: PCIe ref clock routing guide lines

Part Number: AM5708

Hi,

We are using AM5708 as PCie end point and is present on different board than root complex. Clock starts at root complex and through buffer it goes to back plane and then to another board having AM5708. Can you please redirect me to document or resource that has layout guidelines for PCIe ref clk? 

Thanks,

Srivatsa 

  • Standard high-speed differential routing guidelines apply. We do not have a specific document that contains layout guidelines for the PCIe refclk input. The requirement is that the Refclk signal presented at the AM5708 pins be compliant to Refclk parameters listed in the PCIe specification.