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TDA4VM: TDA4VM

Part Number: TDA4VM

I have read the forum FAQ, the link is below:

<https://e2e.ti.com/support/processors-group/processors/f/processors-forum/976016/tda4vm-the-way-to-access-ddr-32gb-area>

I have questions:

1. why "The SOC address space 0x800000000 - 0x87FFFFFFF is permanently disabled on TDA4VM. There is no software configuration to change this."

2. If the first 2GB memory region in external SDRAM high memory region is inaccessible, why the region of high memory region is 0x80 0000 0000 - 0xFF FFFF FFFF, why not 0x89 0000 0000 - 0xFF FFFF FFFF?

  • 1. It is a limitation of the MSMC, which sits in-between the DDR controller and the rest of the processor.

    2. Please see table 8-10 in spruil1c, where it states that the lower 2GB of this region is not supported.

  • Hi, Kevin

    1. The first question is still confused, why there is a limitation? Could you please detail a little?

    2. I have known "The first 2GB of this region are inaccessible", what I want to know is the reasion why they are inaccessible, since the first 2GB are inaccessible, why not adjust the start address of the high memory region from "0x08 0000 0000" to "0x08 8000 0000"?

    3. Besides, I have another question: the total size of DDR is 4GB,but the reserve memory region on DDR in " System Memory Map for Linux+RTOS mode" is not equal to 4GB.

    I want to know the rest region of DDR are used for what, and who use the rest?

    Best Regard,

    Jack