Implementing UART using McBSP of TMS320c6713

Where are you looking for the DX1 signal? At the DSP or at a connector or test point?

Do you see CLKX or FSX toggling?

Regards,
RandyP

Hi RandyP

Thanks for your response. I had checked the signal on the connector itself, but nothing is coming on the pins except a 0 volt signal.

Regards

Iqbal Singh

Iqbal Singh,

Many of the EVMs are designed with circuitry to detect the presence of a daughtercard connected to one or more of the expansion connectors. This is usually one pin on the connector that needs to be grounded to enable on-board drivers to drive signals onto the connector.

Please refer to your board's Technical Reference Manual for information on this; search for "DC_DET" or "detect".

Regards,
RandyP

If you need more help, please reply back. If this answers the question, please click  Verify Answer  , below.

.

Iqbal,

can you try a quick little experiement to isolate the issue a little more.  Try modifying the loopback mcbsp testcase by simply turning off the DLB (loopback) and run and see if the pins are toggling, if they don't then its is likely that there is some type of configuration missing to enable the pin buffers to be turned on.  Typically in other devices the pins are multiplexed with other pin capabilities and that pin multiplexed registers need to be properly selected to the correct function to be used.  I am not very familiar with this device, but am quite familiar witht he mcbsp though.. any how, please keep us posted on your experiement results, based on what Randy and I have suggested.

thanks,

miguel

Hi Iqbal,

The 6713DSK has a CPLD on it which re-directs the McBSP port signals to the 80 pin daughter card connector J3. By default, the signals are 'on board' (used to control the AIC23) so you won't see the CLKx, Dx, etc coming out of J3.

The technical reference for the 6713DSK is available on the Spectrum Digital website at this URL: http://c6000.spectrumdigital.com/dsk6713/V2/docs/dsk6713_TechRef.pdf. Take a look at page 2-3.

Add a line like this at the top of your main() to send the McBSP signals off board to the expansion header:

/* connect McBSP0 and McBSP1 to daughterboard interface */
*((unsigned char*)0x90080006) |= 0x03;  //Set bits 0/1 of MISC CPLD register, send McBSPx Offboard

Hi RandyP

I checked the status of DC_DET bit, It is set to '1', indicating the detection of the Daughter Card. But I doesn't know much about it, what it is, where it is situated on the board, and what it does. No information regarding the Daughter Card is given in the documents that I had. But one thing Tom noticed me is the MUX which switches the McBSP data either to AIC23 Codec (On-Board) or to the 80 pin peripheral connector (Off-Board). I set that corresponding bit, But then also, nothing is coming on the DX1 pin of the connector.

With Regards

Iqbal Singh

Hi Miguel

I had tried the same as you suggested. But it struck in the loop where Data Transmit Flag is being polled. With DLB ON, it works fine.

Regards

Iqbal Singh

Hi Tom,

As you said, I had done it in the same, but I it is still not working. I think that line you suggested is definitely needed their but there must be something else I am missing to initialize.

Thanks

Regards

Iqbal Singh

This works for me:

{

/* connect McBSP0 to daughterboard interface */
*((unsigned char*)0x90080006) |= 0x03;
//Set up the McBSP
hMcbsp1 = MCBSP_open(MCBSP_DEV1, MCBSP_OPEN_RESET);
MCBSP_config(hMcbsp1,&ConfigUART);
MCBSP_start(hMcbsp1,MCBSP_RCV_START | MCBSP_XMIT_START | MCBSP_SRGR_START| MCBSP_SRGR_FRAMESYNC, 0x0);
//Send some data
while(1)
{ MCBSP_write(hMcbsp1, 0xAA55 ); }

}

Hi Tom,

Thanks for your post. I added that code, but in slightly different manner, as shown below:

#define CPLD_MISC  (*(volatile unsigned char *)0x90080006)

void main()

{

CPLD_MISC |= 0x03;

//Set up the McBSP
hMcbsp1 = MCBSP_open(MCBSP_DEV1, MCBSP_OPEN_RESET);
MCBSP_config(hMcbsp1, &ConfigUART);
MCBSP_start(hMcbsp1, MCBSP_RCV_START | MCBSP_XMIT_START | MCBSP_SRGR_START| MCBSP_SRGR_FRAMESYNC, 0x0);

//Send some data
while(1)
{

while(!MCBSP_xrdy(hMcbsp1));

MCBSP_write(hMcbsp1, 0xAAFF ); 

}

}

Without polling the Tx flag, code struck on MCBCP_write(hMcbsp1, 0xAA55 ). Then I checked the FSX1 pin, it starts toggling at 1MHz frequency with 50% duty cycle, But according to the initialization, this bit should be set for one clock cycle after transferring 16*8 bits, and also the Dx1 pin shows only a high level, but still, no data is coming on the pin. I know, I am close to it, But what else next can I do ?

With Regards

Iqbal Singh

Hi again Iqbal,

You might try getting you hands on one of our 5-6K Interface Boards.  This was a board we put together a few years back which will plug into the TMS320C6713 DSK.  Essentially it is a breakout board for those two 80-pin connectors on the DSK.  The board has two serial interface connectors and allows you to access both McBSP0 and McBSP1 via 10-pin 2-row headers on 0.1" centers.  This makes probing the CLKx, FSx, Dx/Dr pretty easy.  With the initialization you have above, what I see is a 1MHz CLKx (50/50 duty cycle) with FSx pulsing low for one clock period.

Hi Tom,

I have to know that whether 5-6K Interface Board is compulsory to attach with the Evaluation kit I have. Cant I see the signal directly on that 80-pin connector ?

Regards,

Iqbal Singh

That should be fine then.  If you'd like to post you main() or perhaps the whole project file, I can try to see why your FSx is not what you expect it to be.

Hi Tom,

This is my the general code, on which I am working.

/*

 * Copyright (C) 2003 Texas Instruments Incorporated

 * All Rights Reserved

 */

/*

 *---------main_mcbsp1.c---------

 *

 * mcbsp1 as UART 

 *  

 */

#ifndef CHIP_6713

#define CHIP_6713 1

#else

#undef CHIP_6713

#define CHIP_6713 1

#endif

#include <stdio.h>

#include <csl.h>

#include <csl_mcbsp.h>

#define SPCR (*(volatile unsigned int *)0x01900008)

#define RCR (*(volatile unsigned int *)0x0190000C)

#define XCR (*(volatile unsigned int *)0x01900010)

#define SRGR (*(volatile unsigned int *)0x01900014)

#define MCR (*(volatile unsigned int *)0x01900018)

#define RCER (*(volatile unsigned int *)0x0190001C)

#define XCER (*(volatile unsigned int *)0x01900020)

#define PCR (*(volatile unsigned int *)0x01900024)

#define CPLD_LED (*(volatile unsigned char *)0x90080000)

#define CPLD_DC_REG (*(volatile unsigned int *)0x90080001)

#define CPLD_VERSION (*(volatile unsigned int *)0x90080004)

#define CPLD_MISC (*(volatile unsigned char *)0x90080006)

#define SETBIT(x, y) (x |= (1 << y))

#define CLRBIT(x, y) (x &= ~(1 << y))

#define MCBSP_SRGR_DEFAULT_DELAY_1 0xFFF

MCBSP_Handle hMcbsp;

// create a config structure for digital loopback mode

static MCBSP_Config ConfigUART = {

  // Serial Port Control Register (SPCR) 

  MCBSP_SPCR_RMK(        

    MCBSP_SPCR_FREE_YES, 

    MCBSP_SPCR_SOFT_DEFAULT,

    MCBSP_SPCR_FRST_DEFAULT,

    MCBSP_SPCR_GRST_DEFAULT,

    MCBSP_SPCR_XINTM_XRDY,                          

    MCBSP_SPCR_XSYNCERR_DEFAULT,

    MCBSP_SPCR_XRST_DEFAULT,

    MCBSP_SPCR_DLB_OFF,

    MCBSP_SPCR_RJUST_RZF,

    MCBSP_SPCR_CLKSTP_DISABLE,

    MCBSP_SPCR_DXENA_OFF,

    MCBSP_SPCR_RINTM_RRDY,

    MCBSP_SPCR_RSYNCERR_DEFAULT,

    MCBSP_SPCR_RRST_DEFAULT

  ),

  //  Receive Control Register (RCR) 

  MCBSP_RCR_RMK(  

    MCBSP_RCR_RPHASE_DUAL,

    MCBSP_RCR_RFRLEN2_OF(1),

    MCBSP_RCR_RWDLEN2_8BIT,

    MCBSP_RCR_RCOMPAND_MSB,

    MCBSP_RCR_RFIG_YES,

    MCBSP_RCR_RDATDLY_1BIT,

    MCBSP_RCR_RFRLEN1_OF(8),

    MCBSP_RCR_RWDLEN1_16BIT,    

    MCBSP_RCR_RWDREVRS_DISABLE                     

  ),

  // Transmit Control Register (XCR) 

  MCBSP_XCR_RMK(

    MCBSP_XCR_XPHASE_DUAL,

    MCBSP_XCR_XFRLEN2_OF(1),

    MCBSP_XCR_XWDLEN2_8BIT,

    MCBSP_XCR_XCOMPAND_MSB,

    MCBSP_XCR_XFIG_YES,

    MCBSP_XCR_XDATDLY_0BIT,

    MCBSP_XCR_XFRLEN1_OF(8),

    MCBSP_XCR_XWDLEN1_16BIT,

   MCBSP_XCR_XWDREVRS_DISABLE

  ),

  //serial port sample rate generator register(SRGR)

  MCBSP_SRGR_RMK(

    MCBSP_SRGR_GSYNC_FREE,

    MCBSP_SRGR_CLKSP_RISING,

    MCBSP_SRGR_CLKSM_INTERNAL,

    MCBSP_SRGR_FSGM_DXR2XSR,

    MCBSP_SRGR_FPER_DEFAULT,

    MCBSP_SRGR_FWID_DEFAULT,

    MCBSP_SRGR_CLKGDV_OF(108)

  ),

  MCBSP_MCR_DEFAULT, // Using default value of MCR register 

  MCBSP_RCER_DEFAULT,// Using default value of RCER register 

  MCBSP_XCER_DEFAULT,// Using default value of XCER register 

  // serial port pin control register(PCR) 

  MCBSP_PCR_RMK(   

    MCBSP_PCR_XIOEN_SP,

    MCBSP_PCR_RIOEN_SP,

    MCBSP_PCR_FSXM_INTERNAL,

    MCBSP_PCR_FSRM_EXTERNAL,

    MCBSP_PCR_CLKXM_OUTPUT,

    MCBSP_PCR_CLKRM_OUTPUT,

    MCBSP_PCR_CLKSSTAT_0,

    MCBSP_PCR_DXSTAT_0,

    MCBSP_PCR_FSXP_ACTIVELOW,

    MCBSP_PCR_FSRP_ACTIVELOW,

    MCBSP_PCR_CLKXP_RISING,

    MCBSP_PCR_CLKRP_FALLING

  )

}; 

/* ---------------------------------------------------------------------------*/  

void main() {

  unsigned int Temp;

  unsigned char CPLD_Ver, Disk_Ver;

  CPLD_LED = 0x0F; //For testing purpose only

  CPLD_LED = 0x00; //For testing purpose only

  /* Initialize the chip support library, must when using CSL */

  CSL_init();

  CPLD_MISC |= 0x03;

  if(CPLD_DC_REG & 0x80) //Test the presence of Daughter Card

  {

    SETBIT(CPLD_LED, 2);

    CLRBIT(CPLD_LED, 2);

  }

  CPLD_Ver = CPLD_VERSION >> 4; //Retrieve the CPLD Version

  Disk_Ver = CPLD_VERSION & 0x07; //Retrieve the Disk Version

  /* Let's open up serial port 1 */

  hMcbsp = MCBSP_open(MCBSP_DEV1, MCBSP_OPEN_RESET);

  /*We have to setup the sample rate generator to allow self clocking.  */

  MCBSP_config(hMcbsp, &ConfigUART);

  /* Now that the port is setup, let's enable it in steps. */

  MCBSP_start(hMcbsp,MCBSP_RCV_START | MCBSP_XMIT_START |

   MCBSP_SRGR_START| MCBSP_SRGR_FRAMESYNC,

0x00);

    //MCBSP_SRGR_DEFAULT_DELAY_1);

  Temp = (unsigned int)hMcbsp; 

  printf("\nhMcbsp   : 0x%x\nCPLD Ver : %d\nDisk Ver : %d\n", Temp, CPLD_Ver, Disk_Ver); //Print the information

  while(1)

  {

    while (!MCBSP_xrdy(hMcbsp));

    MCBSP_write(hMcbsp, 0xAA55);

  }

}

Regards

Iqbal Singh

Hi Iqbal,

I've taken you input above and created a CCSv3 project from it (see attached).  I added McBSP0 into the mix here as well on the off chance that you have some sort of hardware issue associated with McBSP1.  In both cases, the CLKx is just over 1MHz and the FSx is pulsing low for one clock period.  I'm out of the office next week and won't be able to access any hardware to try and help you with debug so hopefully this project file does the trick for you.