Hi all,
I went through the Sygrity SystemSI simulations of an existing system that contains Sitara AM6548 and LPDDR4 memory (Micron MT53E128M32D2DS-046 AAT:A or ISSI IS46LQ32128A-062BLA2). For LPDDR4 memories suggested Ibis models are used. For Sitara AM6548 models from the last sheet within AM65x_DRA80xM_EMIF_Tool_2.02 are used. So, for Sitara:
| Suggested Models to Use | |
| Clock Driver | DWC_D5MC4_48_SR11 |
| Addr/Cmd/Ctrl Driver | DWC_D5MP4_48_SR11 |
| Data Receiver | DWC_D5MP4_34ODT48 |
| Data Driver | DWC_D5MP4_48_SR11 |
| DQS Receiver | DWC_D5MQ4_34ODT48 |
| DQS Driver | DWC_D5MQ4_48_SR11 |
For Sitara AM6548 the AM6548 IBIS Model SPRM723_v0p1.ibs is used.
During the read cycle everything works well and the voltage levels are OK for both memories:

We have an issue with voltage levels regardless of the memory model being used for simulation during the write cycle on DQx and DQSx lines and with AddrCmd and Ctrl lines. Simply speaking the voltage levels are too high.

Can you confirm that the suggested Sitara Ibis models are the right ones?
Best regards,
Zoran Dukic