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DRA829V: QSPI Booting

Part Number: DRA829V
Other Parts Discussed in Thread: J721EXSOMXEVM, DRA829

Hi Team,

We're trying to boot from QSPI flash on the EVM.

We have programmed the U-Boot images to the flash following the below guide:

https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-jacinto7/latest/exports/docs/linux/Foundational_Components/U-Boot/UG-QSPI.html

 

Then I set the MCU Boot Mode (SW9) to QSPI: SW9.3 (MCU4 -> ON) and SW9.5 (MCU_ONLY -> ON)

However, the board does not boot. I have also tried booting with eMMC. Same issue.

Would you please let me know if I have made any mistake in any of the above steps?

We are using the J721EXSOMXEVM and are trying to get the EVM to boot from QSPI (ideally) or eMMC.

Thank you!

Joe

  • Hi Joe,

    What issues are you facing while booting? Can you please share the logs?

    Regards,
    Parth

  • Hi Parth,

    After examining the log again, I think there was an issue when erasing/writing to the OSPI/QSPI flash under U-Boot. It was why the board had no console printouts when configured to boot from OSPI/QSPI flash.

     

    As you may see from the attached log, it skipped all bytes to be written to the flash. I also noticed that it fails at erasing the flash (please see the error log below). I tried many different erase sizes in multiple of 1024 bytes, but none was successful. I checked j721e_evm.h and did not find any macro defines for the erase size.

     

    *********************************************

    => sf erase 0 10000

    SF: Erase offset/length not multiple of erase size

    SF: 65536 bytes @ 0x0 Erased: ERROR

    *********************************************

     

    But to make sure I configured the board correctly, would you please also let me know SW9 and SW8 setting for booting from OSPI/QSPI flash?

     

    Please advise why I was not able to write U-Boot related binaries to the flash.

    Thank you,

    Joe

    U-Boot SPL 2020.01-g3c9ebdb87d (Nov 19 2020 - 18:33:21 +0000)
    SYSFW ABI: 3.1 (firmware rev 0x0014 '20.8.5--v2020.08b (Terrific Lla')
    Trying to boot from MMC2
    Loading Environment from MMC... *** Warning - No MMC card found, using default environment
    
    Starting ATF on ARM64 core...
    
    NOTICE:  BL31: v2.3():07.01.00.004-1-g52c334fc3-dirty
    NOTICE:  BL31: Built : 18:17:14, Nov 19 2020
    
    U-Boot SPL 2020.01-g3c9ebdb87d (Nov 19 2020 - 18:29:59 +0000)
    SYSFW ABI: 3.1 (firmware rev 0x0014 '20.8.5--v2020.08b (Terrific Lla')
    Detected: J7X-BASE-CPB rev E3
    Detected: J7X-VSC8514-ETH rev E2
    Trying to boot from MMC2
    
    
    U-Boot 2020.01-g3c9ebdb87d (Nov 19 2020 - 18:29:59 +0000)
    
    SoC:   J721E SR2.0
    Model: Texas Instruments K3 J721E SoC
    Board: J721EX-PM2-SOM rev E8
    DRAM:  4 GiB
    not found for dev hbmc-mux
    Flash: 0 Bytes
    MMC:   sdhci@4f80000: 0, sdhci@4fb0000: 1
    Loading Environment from MMC... OK
    In:    serial@2800000
    Out:   serial@2800000
    Err:   serial@2800000
    Detected: J7X-BASE-CPB rev E3
    Detected: J7X-VSC8514-ETH rev E2
    Net:   eth0: ethernet@46000000
    Hit any key to stop autoboot:  0 
    => sf probe
    SF: Detected mt35xu512aba with page size 256 Bytes, erase size 128 KiB, total 64 MiB
    => tftp ${loadaddr} tiboot3.bin
    link up on port 1, speed 1000, full duplex
    Using ethernet@46000000 device
    TFTP from server 172.17.70.212; our IP address is 172.17.70.75
    Filename 'tiboot3.bin'.
    Load address: 0x82000000
    Loading: #################################################
             7 MiB/s
    done
    Bytes transferred = 250297 (3d1b9 hex)
    => sf update $loadaddr 0x0 $filesize
    device 0 offset 0x0, size 0x3d1b9
    0 bytes written, 250297 bytes skipped in 0.15s, speed 13489690 B/s
    => tftp ${loadaddr} tispl.bin
    link up on port 1, speed 1000, full duplex
    Using ethernet@46000000 device
    TFTP from server 172.17.70.212; our IP address is 172.17.70.75
    Filename 'tispl.bin'.
    Load address: 0x82000000
    Loading: #################################################################
             #################################################################
             #############################################
             7.9 MiB/s
    done
    Bytes transferred = 893676 (da2ec hex)
    
    
    

  • Hi Keerthy,

    I understand that the default boot mode setting for the EV board is SD card boot mode with SW8 & 9 settings as shown below:

    SW8: 10000010
    SW9: 00000000

    However, when I refer to Table 4-8 from datasheet (spruil1c.pdf) attached below, the above switch setting does not seem to imply SD card boot mode. Instead, shouldn't the setting be:

    SW8: 10000000
    SW9: 00000000

    Would you please help me make sense out of this setting?

    As for the setting QSPI boot mode settings, however, makes sense to me (where SW9.2 is MCU4):

    SW8: 00000000
    SW9: 00100000

    In addition, if I was to set it to OSPI boot mode, will the switch setting be as shown below?

    SW8: 00000000
    SW9: 01000000

    Many Thanks,

    Philip

  • In addition, if I was to set it to OSPI boot mode, will the switch setting be as shown below?

    SW8: 00000000
    SW9: 01000000

    That is correct.

    As for the setting QSPI boot mode settings, however, makes sense to me (where SW9.2 is MCU4):

    SW8: 00000000
    SW9: 00100000

    Okay.

    Now getting to your SD boot mode. Let me clarify that. You must look at EVM user guide for the exact pin mapping: https://www.ti.com/lit/ug/spruis4d/spruis4d.pdf?ts=1651555074394&ref_url=https%253A%252F%252Fwww.google.com%252F

    Page: 21

    The SW8.1 pin maps to Primary Boot Mode B

    Now Looking at TRM:

    SW8.1 should be set to 1 i.e Primary Boot Mode B Pin should be 1.

    Also the Primary Boot Mode Config pins should be set to 001 as per below table in TRM:

    Primary Boot Mode Config Pins --> 

    This is set to 001.
    To make it clear: Primary Boot Mode Config should be 001 & Primary Boot Mode A is 000.

    Cheers,
    Keerthy

  • Hi Keerthy,

    Thank you for the detail explanation. I think I got it now!

    Many Thanks,

    Philip