Hi,
Our processor is TDA4VM, with ti rots 08_00_00_12 SDK version.
We are trying to use dual display with dsi(4 lane) and dp by revising Vision app code.
After revising the code, dp work fine but dsi doen't work.
we run the run_app_tidl.sh, only dp shows picture but dsi didn't (dsi data lane had no output).
The code where we modify and run vision_apps_init.sh as below:
app_cfg_mcu2_0.h:
#undef ENABLE_DSS_SINGLE
#define ENABLE_DSS_DUAL
#define ENABLE_DSS_DSI
#undef ENABLE_CSI2TX
app_init.c :
#ifdef ENABLE_DSS_DUAL
{
app_dss_dual_display_default_prm_t prm;
uint32_t i;
/* default parameters are enough to enable both EDP and HDMI */
appDssDualDisplayDefaultSetDefaultPrm(&prm);
prm.enableM2m = true;
/* Do not rely on "init". Always provide known good tmings */
for (i = 0; i < 2; i++)
{
if (i == 0)
{
prm.display[i].timings.width = 1920U;
prm.display[i].timings.height = 1080U;
prm.display[i].timings.hFrontPorch = 88U;
prm.display[i].timings.hBackPorch = 148U;
prm.display[i].timings.hSyncLen = 44U;
prm.display[i].timings.vFrontPorch = 4U;
prm.display[i].timings.vBackPorch = 36U;
prm.display[i].timings.vSyncLen = 5U;
prm.display[i].timings.pixelClock = 148500000ULL;
}
else
{
//prm->display_type = APP_DSS_DEFAULT_DISPLAY_TYPE_DPI_HDMI;
prm.display[i].display_type = APP_DSS_DEFAULT_DISPLAY_TYPE_DSI;
prm.display[i].timings.width = 1280U;
prm.display[i].timings.height = 800U;
prm.display[i].timings.hFrontPorch = 110U;
prm.display[i].timings.hBackPorch = 220U;
prm.display[i].timings.hSyncLen = 40U;
prm.display[i].timings.vFrontPorch = 5U;
prm.display[i].timings.vBackPorch = 20U;
prm.display[i].timings.vSyncLen = 5U;
prm.display[i].timings.pixelClock = 74250000ULL;
}
}
status = appDssDualDisplayDefaultInit(&prm);
APP_ASSERT_SUCCESS(status);
}
#endif
app_dss_dual_display_defaults.c:
void appDssDualDisplayDefaultSetDefaultPrm(app_dss_dual_display_default_prm_t *dual_display_prm)
{
uint32_t i;
for (i = 0; i < 2; i++)
{
app_dss_default_prm_t *prm;
prm = &dual_display_prm->display[i];
if (i == 0)
{
prm->display_type = APP_DSS_DEFAULT_DISPLAY_TYPE_EDP;
prm->timings.width = 1920U;
prm->timings.height = 1080U;
prm->timings.hFrontPorch = 88U;
prm->timings.hBackPorch = 148U;
prm->timings.hSyncLen = 44U;
prm->timings.vFrontPorch = 4U;
prm->timings.vBackPorch = 36U;
prm->timings.vSyncLen = 5U;
prm->timings.pixelClock = 148500000ULL;
}
else
{
//prm->display_type = APP_DSS_DEFAULT_DISPLAY_TYPE_DPI_HDMI;
prm->display_type = APP_DSS_DEFAULT_DISPLAY_TYPE_DSI;
prm->timings.width = 1280U;
prm->timings.height = 800U;
prm->timings.hFrontPorch = 110U;
prm->timings.hBackPorch = 220U;
prm->timings.hSyncLen = 40U;
prm->timings.vFrontPorch = 5U;
prm->timings.vBackPorch = 20U;
prm->timings.vSyncLen = 5U;
prm->timings.pixelClock = 74250000ULL;
}
..
int32_t appDssDualDisplayDefaultInit(app_dss_dual_display_default_prm_t *dual_display_prm)
{
int32_t retVal = 0;
app_dss_init_params_t dssParams;
app_dss_dual_display_default_obj_t *dual_display_obj = &g_app_dss_dual_display_default_obj;
uint32_t i;
appLogPrintf("DSS DUAL DISPLAY: Init ... !!!\n");
appDssInitParamsInit(&dssParams);
dssParams.isPipeAvailable[APP_DSS_VID_PIPE_ID_VID1] = true;
dssParams.isPipeAvailable[APP_DSS_VID_PIPE_ID_VID2] = true;
dssParams.isPipeAvailable[APP_DSS_VID_PIPE_ID_VIDL1] = true;
dssParams.isPipeAvailable[APP_DSS_VID_PIPE_ID_VIDL2] = false;
for (i = 0; i < APP_DSS_VID_PIPE_ID_MAX; i++)
{
dual_display_obj->vid_pipe_to_display_map[i] = dual_display_prm->vid_pipe_to_display_map[i];
}
for (i = 0; i < 2; i++)
{
app_dss_default_prm_t *prm;
app_dss_default_obj_t *obj;
prm = &dual_display_prm->display[i];
obj = &dual_display_obj->display[i];
memcpy(&obj->initPrm, prm, sizeof(*prm));
if (prm->display_type == APP_DSS_DEFAULT_DISPLAY_TYPE_EDP)
{
appLogPrintf("DSS DUAL DISPLAY: Display %d type is eDP !!!\n", i);
obj->nodeOverlayId = APP_DCTRL_NODE_OVERLAY1;
obj->nodeVpId = APP_DCTRL_NODE_VP1;
obj->nodeDpiId = APP_DCTRL_NODE_EDP_DPI0;
obj->overlayId = APP_DSS_OVERLAY_ID_1;
obj->vpId = APP_DSS_VP_ID_1;
obj->videoIfWidth = APP_DCTRL_VIFW_36BIT;
}
else
{
appLogPrintf("DSS DUAL DISPLAY: Display %d type is DSI !!!\n", i);
obj->nodeOverlayId = APP_DCTRL_NODE_OVERLAY3;
obj->nodeVpId = APP_DCTRL_NODE_VP3;
obj->nodeDpiId = APP_DCTRL_NODE_DSI_DPI2;
obj->overlayId = APP_DSS_OVERLAY_ID_3;
obj->vpId = APP_DSS_VP_ID_3;
obj->videoIfWidth = APP_DCTRL_VIFW_24BIT;
#if 0
appLogPrintf("DSS DUAL DISPLAY: Display %d type is HDMI !!!\n", i);
obj->nodeOverlayId = APP_DCTRL_NODE_OVERLAY2;
obj->nodeVpId = APP_DCTRL_NODE_VP2;
obj->nodeDpiId = APP_DCTRL_NODE_DPI_DPI0;
obj->overlayId = APP_DSS_OVERLAY_ID_2;
obj->vpId = APP_DSS_VP_ID_2;
obj->videoIfWidth = APP_DCTRL_VIFW_24BIT;
#endif
}
appDssConfigurePm(prm);
if ((prm->display_type == APP_DSS_DEFAULT_DISPLAY_TYPE_DPI_HDMI) ||
(prm->display_type == APP_DSS_DEFAULT_DISPLAY_TYPE_EDP))
{
appDssConfigureBoard(prm);
}
/*if (prm->display_type == APP_DSS_DEFAULT_DISPLAY_TYPE_DSI)
{
appDssConfigureUB941AndUB925(prm); //J7 serializer
}*/
dssParams.isOverlayAvailable[obj->overlayId] = true;
dssParams.isPortAvailable[obj->vpId] = true;
if (prm->display_type == APP_DSS_DEFAULT_DISPLAY_TYPE_EDP)
{
dssParams.isDpAvailable = true;
}
if (prm->display_type == APP_DSS_DEFAULT_DISPLAY_TYPE_DSI)
{
dssParams.isDsiAvailable = true;
}
}
...
}
int32_t appDctrlDualDisplayDefaultInit(app_dss_dual_display_default_obj_t *dual_display_obj)
{
int32_t retVal = 0;
uint32_t cpuId = APP_IPC_CPU_MCU2_0;
bool doAdvVpSetup[2] = {false, false};
bool doHpd = false;
uint32_t i, display_id;
app_dctrl_path_info_t pathInfo;
app_dctrl_vp_params_t vpParams[2];
app_dctrl_adv_vp_params_t advVpParams[2];
app_dctrl_overlay_params_t overlayParams[2];
app_dctrl_layer_params_t layerParams[2];
app_dctrl_dsi_params_t dsiParams;//-->Try to used four lane
appDctrlPathInfoInit(&pathInfo);
for (i = 0; i < 2; i++)
{
app_dss_default_obj_t *obj;
obj = &dual_display_obj->display[i];
appDctrlVpParamsInit(&vpParams[i]);
appDctrlOverlayParamsInit(&overlayParams[i]);
appDctrlLayerParamsInit(&layerParams[i]);
if (obj->initPrm.display_type == APP_DSS_DEFAULT_DISPLAY_TYPE_EDP)
{
appDctrlAdvVpParamsInit(&advVpParams[i]);
doAdvVpSetup[i] = true;
doHpd = true;
}
if (obj->initPrm.display_type == APP_DSS_DEFAULT_DISPLAY_TYPE_DSI)
{
appDctrlAdvVpParamsInit(&advVpParams[i]);
advVpParams[i].vpId = obj->vpId;
doAdvVpSetup[i] = true;
}
vpParams[i].vpId = obj->vpId;
/* Always expect the app to provide a custom resolution */
vpParams[i].standard = APP_DCTRL_VID_STD_CUSTOM;
vpParams[i].width = obj->initPrm.timings.width;
vpParams[i].height = obj->initPrm.timings.height;
vpParams[i].hFrontPorch = obj->initPrm.timings.hFrontPorch;
vpParams[i].hBackPorch = obj->initPrm.timings.hBackPorch;
vpParams[i].hSyncLen = obj->initPrm.timings.hSyncLen;
vpParams[i].vFrontPorch = obj->initPrm.timings.vFrontPorch;
vpParams[i].vBackPorch = obj->initPrm.timings.vBackPorch;
vpParams[i].vSyncLen = obj->initPrm.timings.vSyncLen;
vpParams[i].pixelClock = (uint32_t)(obj->initPrm.timings.pixelClock / 1000ULL);
vpParams[i].videoIfWidth = obj->videoIfWidth;
if (obj->initPrm.display_type == APP_DSS_DEFAULT_DISPLAY_TYPE_EDP)
{
advVpParams[i].hVAlign = APP_DCTRL_HVSYNC_ALIGN_ON;
advVpParams[i].hVClkControl = APP_DCTRL_HVCLK_CTRL_ON;
advVpParams[i].hVClkRiseFall = APP_DCTRL_EDGE_POL_RISING;
vpParams[i].actVidPolarity = APP_DCTRL_POL_HIGH;
vpParams[i].pixelClkPolarity = APP_DCTRL_EDGE_POL_RISING;
vpParams[i].hsPolarity = APP_DCTRL_POL_HIGH;
vpParams[i].vsPolarity = APP_DCTRL_POL_HIGH;
}
else if (obj->initPrm.display_type == APP_DSS_DEFAULT_DISPLAY_TYPE_DSI)
{
advVpParams[i].hVAlign = APP_DCTRL_HVSYNC_ALIGN_ON;
vpParams[i].actVidPolarity = APP_DCTRL_POL_HIGH;
vpParams[i].pixelClkPolarity = APP_DCTRL_EDGE_POL_RISING;
vpParams[i].hsPolarity = APP_DCTRL_POL_LOW;
vpParams[i].vsPolarity = APP_DCTRL_POL_LOW;
}
else
{
vpParams[i].pixelClkPolarity = APP_DCTRL_EDGE_POL_FALLING;
}
overlayParams[i].overlayId = obj->overlayId;
overlayParams[i].colorKeyEnable = 1;
overlayParams[i].colorKeySel = APP_DCTRL_OVERLAY_TRANS_COLOR_SRC;
overlayParams[i].transColorKeyMin = 0x0u;
overlayParams[i].transColorKeyMax = 0x0u;
overlayParams[i].backGroundColor = 0x0u;
layerParams[i].overlayId = obj->overlayId;
display_id = dual_display_obj->vid_pipe_to_display_map[APP_DSS_VID_PIPE_ID_VID1];
if (display_id == i)
{
layerParams[i].pipeLayerNum[APP_DSS_VID_PIPE_ID_VID1] = APP_DCTRL_OVERLAY_LAYER_NUM_0;
}
else
{
layerParams[i].pipeLayerNum[APP_DSS_VID_PIPE_ID_VID1] = APP_DCTRL_OVERLAY_LAYER_INVALID;
}
display_id = dual_display_obj->vid_pipe_to_display_map[APP_DSS_VID_PIPE_ID_VID2];
if (display_id == i)
{
layerParams[i].pipeLayerNum[APP_DSS_VID_PIPE_ID_VID2] = APP_DCTRL_OVERLAY_LAYER_NUM_0;
}
else
{
layerParams[i].pipeLayerNum[APP_DSS_VID_PIPE_ID_VID2] = APP_DCTRL_OVERLAY_LAYER_INVALID;
}
display_id = dual_display_obj->vid_pipe_to_display_map[APP_DSS_VID_PIPE_ID_VIDL1];
if (display_id == i)
{
/* VIDL1 this is graphics overlay layer and it MUST be top most layer, i.e layer num 4 in j721e */
layerParams[i].pipeLayerNum[APP_DSS_VID_PIPE_ID_VIDL1] = APP_DCTRL_OVERLAY_LAYER_NUM_4;
}
else
{
layerParams[i].pipeLayerNum[APP_DSS_VID_PIPE_ID_VIDL1] = APP_DCTRL_OVERLAY_LAYER_INVALID;
}
/* this is used by Linux on A72 so should be kept as disabled or invalid here */
layerParams[i].pipeLayerNum[APP_DSS_VID_PIPE_ID_VIDL2] = APP_DCTRL_OVERLAY_LAYER_INVALID;
}
pathInfo.edgeInfo[pathInfo.numEdges].startNode = APP_DCTRL_NODE_VID1;
display_id = dual_display_obj->vid_pipe_to_display_map[APP_DSS_VID_PIPE_ID_VID1];
if (display_id >= 2)
display_id = 0;
pathInfo.edgeInfo[pathInfo.numEdges].endNode = dual_display_obj->display[display_id].nodeOverlayId;
pathInfo.numEdges++;
pathInfo.edgeInfo[pathInfo.numEdges].startNode = APP_DCTRL_NODE_VID2;
display_id = dual_display_obj->vid_pipe_to_display_map[APP_DSS_VID_PIPE_ID_VID2];
if (display_id >= 2)
display_id = 0;
pathInfo.edgeInfo[pathInfo.numEdges].endNode = dual_display_obj->display[display_id].nodeOverlayId;
pathInfo.numEdges++;
pathInfo.edgeInfo[pathInfo.numEdges].startNode = APP_DCTRL_NODE_VIDL1;
display_id = dual_display_obj->vid_pipe_to_display_map[APP_DSS_VID_PIPE_ID_VIDL1];
if (display_id >= 2)
display_id = 0;
pathInfo.edgeInfo[pathInfo.numEdges].endNode = dual_display_obj->display[display_id].nodeOverlayId;
pathInfo.numEdges++;
pathInfo.edgeInfo[pathInfo.numEdges].startNode = dual_display_obj->display[0].nodeOverlayId;
pathInfo.edgeInfo[pathInfo.numEdges].endNode = dual_display_obj->display[0].nodeVpId;
pathInfo.numEdges++;
pathInfo.edgeInfo[pathInfo.numEdges].startNode = dual_display_obj->display[0].nodeVpId;
pathInfo.edgeInfo[pathInfo.numEdges].endNode = dual_display_obj->display[0].nodeDpiId;
pathInfo.numEdges++;
pathInfo.edgeInfo[pathInfo.numEdges].startNode = dual_display_obj->display[1].nodeOverlayId;
pathInfo.edgeInfo[pathInfo.numEdges].endNode = dual_display_obj->display[1].nodeVpId;
pathInfo.numEdges++;
pathInfo.edgeInfo[pathInfo.numEdges].startNode = dual_display_obj->display[1].nodeVpId;
pathInfo.edgeInfo[pathInfo.numEdges].endNode = dual_display_obj->display[1].nodeDpiId;
pathInfo.numEdges++;
if (true == dual_display_obj->m2m.enableM2m)
{
pathInfo.edgeInfo[pathInfo.numEdges].startNode = dual_display_obj->m2m.pipeId;
pathInfo.edgeInfo[pathInfo.numEdges].endNode = dual_display_obj->m2m.nodeOverlayId;
pathInfo.numEdges++;
pathInfo.edgeInfo[pathInfo.numEdges].startNode = dual_display_obj->m2m.nodeOverlayId;
pathInfo.edgeInfo[pathInfo.numEdges].endNode = dual_display_obj->m2m.nodeVpId;
pathInfo.numEdges++;
}
retVal = appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_REGISTER_HANDLE, &doHpd, sizeof(doHpd), 0U);
for (i = 0; i < 2; i++)
{
app_dss_default_obj_t *obj;
obj = &dual_display_obj->display[i];
if (obj->initPrm.display_type == APP_DSS_DEFAULT_DISPLAY_TYPE_DSI)
{
dsiParams.num_lanes = 4u;
retVal += appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_SET_DSI_PARAMS, &dsiParams, sizeof(dsiParams), 0U);
}
}
retVal += appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_SET_PATH, &pathInfo, sizeof(pathInfo), 0U);
for (i = 0; i < 2; i++)
{
retVal += appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_SET_VP_PARAMS, &vpParams[i], sizeof(vpParams[i]), 0U);
if (true == doAdvVpSetup[i])
{
retVal += appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_SET_ADV_VP_PARAMS, &advVpParams[i], sizeof(advVpParams[i]), 0U);
}
retVal += appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_SET_OVERLAY_PARAMS, &overlayParams[i], sizeof(overlayParams[i]), 0U);
retVal += appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_SET_LAYER_PARAMS, &layerParams[i], sizeof(layerParams[i]), 0U);
}
return retVal;
}
Run vision_apps_init.sh show as below:
root@j7-evm:/opt/vision_apps# [MCU2_0] 3.553533 s: CIO: Init ... Done !!! [MCU2_0] 3.553589 s: ### CPU Frequency = 1000000000 Hz [MCU2_0] 3.553620 s: APP: Init ... !!! [MCU2_0] 3.553640 s: SCICLIENT: Init ... !!! [MCU2_0] 3.553842 s: SCICLIENT: DMSC FW version [21.5.0--v2021.05 (Terrific Llam] [MCU2_0] 3.553881 s: SCICLIENT: DMSC FW revision 0x15 [MCU2_0] 3.553906 s: SCICLIENT: DMSC FW ABI revision 3.1 [MCU2_0] 3.553931 s: SCICLIENT: Init ... Done !!! [MCU2_0] 3.553953 s: UDMA: Init ... !!! [MCU2_0] 3.554992 s: UDMA: Init ... Done !!! [MCU2_0] 3.555037 s: MEM: Init ... !!! [MCU2_0] 3.555069 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ e1000000 of size 16777216 bytes !!! [MCU2_0] 3.555123 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 262144 bytes !!! [MCU2_0] 3.555169 s: MEM: Created heap (DDR_NON_CACHE_ME, id=5, flags=0x00000000) @ d8000000 of size 16777216 bytes !!! [MCU2_0] 3.555213 s: MEM: Init ... Done !!! [MCU2_0] 3.555232 s: IPC: Init ... !!! [MCU2_0] 3.555289 s: IPC: 6 CPUs participating in IPC !!! [MCU2_0] 3.555328 s: IPC: Waiting for HLOS to be ready ... !!! [MCU2_0] 16.441783 s: IPC: HLOS is ready !!! [MCU2_0] 16.446861 s: IPC: Init ... Done !!! [MCU2_0] 16.446912 s: APP: Syncing with 5 CPUs ... !!! [MCU2_0] 18.471793 s: APP: Syncing with 5 CPUs ... Done !!! [MCU2_0] 18.471836 s: REMOTE_SERVICE: Init ... !!! [MCU2_0] 18.473187 s: REMOTE_SERVICE: Init ... Done !!! [MCU2_0] 18.473236 s: ETHFW: Init ... !!! [MCU2_0] 18.491832 s: CPSW_9G Test on MAIN NAVSS [MCU2_0] 18.505174 s: ETHFW: Version : 0.01.01 [MCU2_0] 18.505232 s: ETHFW: Build Date: Aug 12, 2021 [MCU2_0] 18.505267 s: ETHFW: Build Time: 11:51:44 [MCU2_0] 18.505290 s: ETHFW: Commit SHA: fc8c791d [MCU2_0] 18.505346 s: ETHFW: Init ... DONE !!! [MCU2_0] 18.505374 s: ETHFW: Remove server Init ... !!! [MCU2_0] 18.506137 s: Remote demo device (core : mcu2_0) ..... [MCU2_0] 18.506189 s: ETHFW: Remove server Init ... DONE !!! [MCU2_0] 18.507085 s: Starting lwIP, local interface IP is dhcp-enabled [MCU2_0] 18.512720 s: Host MAC address: 70:ff:76:1d:92:c2 [MCU2_0] 18.555265 s: FVID2: Init ... !!! [MCU2_0] 18.555361 s: FVID2: Init ... Done !!! [MCU2_0] 18.555408 s: DSS DUAL DISPLAY: Init ... !!! [MCU2_0] 18.555439 s: DSS DUAL DISPLAY: Display 0 type is eDP !!! [MCU2_0] 18.555472 s: DSS: SoC init ... !!! [MCU2_0] 18.555492 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2 [MCU2_0] 18.555658 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 18.555691 s: SCICLIENT: Sciclient_pmSetModuleState module=297 state=2 [MCU2_0] 18.555830 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 18.555856 s: SCICLIENT: Sciclient_pmSetModuleState module=151 state=2 [MCU2_0] 18.555961 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 18.555987 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=9 parent=11 [MCU2_0] 18.556071 s: SCICLIENT: Sciclient_pmSetModuleClkParent success [MCU2_0] 18.556099 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=13 parent=18 [MCU2_0] 18.556171 s: SCICLIENT: Sciclient_pmSetModuleClkParent success [MCU2_0] 18.556197 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=1 parent=2 [MCU2_0] 18.556318 s: SCICLIENT: Sciclient_pmSetModuleClkParent success [MCU2_0] 18.556359 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=152 clk=1 freq=148500000 [MCU2_0] 18.557324 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success [MCU2_0] 18.557362 s: SCICLIENT: Sciclient_pmModuleClkRequest module=152 clk=1 state=2 flag=0 [MCU2_0] 18.557479 s: SCICLIENT: Sciclient_pmModuleClkRequest success [MCU2_0] 18.557511 s: DSS: SoC init ... Done !!! [MCU2_0] 18.557533 s: DSS: Board init ... !!! [MCU2_0] 18.557553 s: DSS: Board init ... Done !!! [MCU2_0] 18.557575 s: DSS DUAL DISPLAY: Display 1 type is DSI !!! [MCU2_0] 18.557603 s: DSS: SoC init ... !!! [MCU2_0] 18.557621 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2 [MCU2_0] 18.557704 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 18.557734 s: SCICLIENT: Sciclient_pmSetModuleState module=150 state=2 [MCU2_0] 18.557841 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 18.557868 s: SCICLIENT: Sciclient_pmSetModuleState module=296 state=2 [MCU2_0] 18.557969 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 18.557995 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=9 parent=11 [MCU2_0] 18.558076 s: SCICLIENT: Sciclient_pmSetModuleClkParent success [MCU2_0] 18.558104 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=152 clk=9 freq=74250000 [MCU2_0] 18.559098 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success [MCU2_0] 18.559141 s: SCICLIENT: Sciclient_pmModuleClkRequest module=152 clk=9 state=2 flag=0 [MCU2_0] 18.559296 s: SCICLIENT: Sciclient_pmModuleClkRequest success [MCU2_0] 18.559336 s: DSS: SoC init ... Done !!! [MCU2_0] 18.559361 s: DSS: Configuring SERDES ... !!! [MCU2_0] 18.570264 s: DSS: Write Failed for ClientAddr 0x16 RegAddr 0x1 Value 0xa ! [MCU2_0] 18.570333 s: DSS: SERDES Configuration... Done !!! [MCU2_0] 18.570363 s: DSS: M2M Path is enabled !!! [MCU2_0] 18.584457 s: [LWIPIF_LWIP] NETIF INIT SUCCESS [MCU2_0] 18.584521 s: Added interface 'ti1', IP is 0.0.0.0 [MCU2_0] 18.589188 s: DSS DUAL DISPLAY: Init ... Done !!! [MCU2_0] 18.589354 s: VHWA: VPAC Init ... !!! [MCU2_0] 18.589389 s: SCICLIENT: Sciclient_pmSetModuleState module=290 state=2 [MCU2_0] 18.589543 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 18.589574 s: VHWA: LDC Init ... !!! [MCU2_0] 18.592572 s: VHWA: LDC Init ... Done !!! [MCU2_0] 18.592620 s: VHWA: MSC Init ... !!! [MCU2_0] 18.601759 s: VHWA: MSC Init ... Done !!! [MCU2_0] 18.601812 s: VHWA: NF Init ... !!! [MCU2_0] 18.603354 s: VHWA: NF Init ... Done !!! [MCU2_0] 18.603402 s: VHWA: VISS Init ... !!! [MCU2_0] 18.613352 s: VHWA: VISS Init ... Done !!! [MCU2_0] 18.613406 s: VHWA: VPAC Init ... Done !!! [MCU2_0] 18.613443 s: VX_ZONE_INIT:Enabled [MCU2_0] 18.613466 s: VX_ZONE_ERROR:Enabled [MCU2_0] 18.613489 s: VX_ZONE_WARNING:Enabled [MCU2_0] 18.614504 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target IPU1-0 [MCU2_0] 18.614691 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_NF [MCU2_0] 18.614860 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_LDC1 [MCU2_0] 18.615010 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_MSC1 [MCU2_0] 18.615177 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_MSC2 [MCU2_0] 18.615498 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_VISS1 [MCU2_0] 18.615711 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE1 [MCU2_0] 18.615920 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE2 [MCU2_0] 18.616120 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DISPLAY1 [MCU2_0] 18.616411 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DISPLAY2 [MCU2_0] 18.616596 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CSITX [MCU2_0] 18.616800 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE3 [MCU2_0] 18.617006 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE4 [MCU2_0] 18.617207 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE5 [MCU2_0] 18.617514 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE6 [MCU2_0] 18.617726 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE7 [MCU2_0] 18.617924 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE8 [MCU2_0] 18.618108 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DSS_M2M1 [MCU2_0] 18.618399 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DSS_M2M2 [MCU2_0] 18.618605 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DSS_M2M3 [MCU2_0] 18.618793 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DSS_M2M4 [MCU2_0] 18.618836 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!! [MCU2_0] 18.618864 s: APP: OpenVX Target kernel init ... !!! [MCU2_0] 18.631225 s: APP: OpenVX Target kernel init ... Done !!! [MCU2_0] 18.631366 s: CSI2RX: Init ... !!! [MCU2_0] 18.631393 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2 [MCU2_0] 18.631501 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 18.631533 s: SCICLIENT: Sciclient_pmSetModuleState module=26 state=2 [MCU2_0] 18.631638 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 18.631669 s: SCICLIENT: Sciclient_pmSetModuleState module=27 state=2 [MCU2_0] 18.631759 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 18.631785 s: SCICLIENT: Sciclient_pmSetModuleState module=147 state=2 [MCU2_0] 18.631849 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 18.631876 s: SCICLIENT: Sciclient_pmSetModuleState module=148 state=2 [MCU2_0] 18.631938 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 18.632664 s: CSI2RX: Init ... Done !!! [MCU2_0] 18.632710 s: ISS: Init ... !!! [MCU2_0] 18.632748 s: IssSensor_Init ... Done !!! [MCU2_0] 18.632840 s: vissRemoteServer_Init ... Done !!! [MCU2_0] 18.632907 s: IttRemoteServer_Init ... Done !!! [MCU2_0] 18.632937 s: UDMA Copy: Init ... !!! [MCU2_0] 18.634555 s: UDMA Copy: Init ... Done !!! [MCU2_0] 18.634645 s: APP: Init ... Done !!! [MCU2_0] 18.634673 s: APP: Run ... !!! [MCU2_0] 18.634695 s: IPC: Starting echo test ... [MCU2_0] 18.636749 s: APP: Run ... Done !!! [MCU2_0] 18.638090 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C66X_1[P] C66X_2[.] C7X_1[.] [MCU2_0] 18.638194 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[.] C7X_1[.] [MCU2_0] 18.638425 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[.] [MCU2_0] 18.804913 s: Function:CpswProxyServer_attachExtHandlerCb,HostId:0,CpswType:6 [MCU2_0] 21.573165 s: Function:CpswProxyServer_registerMacHandlerCb,HostId:0,Handle:a2fb6054,CoreKey:38acb7e6, MacAddress:70:ff:76:1d:92:c1, FlowIdx:172, FlowIdxOffset:0 [MCU2_0] 21.576231 s: Cpsw_ioctlInternal: CPSW: Registered MAC address.ALE entry:12, Policer Entry:1 [MCU2_1] 3.557170 s: CIO: Init ... Done !!! [MCU2_1] 3.557222 s: ### CPU Frequency = 1000000000 Hz [MCU2_1] 3.557254 s: APP: Init ... !!! [MCU2_1] 3.557272 s: SCICLIENT: Init ... !!! [MCU2_1] 3.557477 s: SCICLIENT: DMSC FW version [21.5.0--v2021.05 (Terrific Llam] [MCU2_1] 3.557514 s: SCICLIENT: DMSC FW revision 0x15 [MCU2_1] 3.557537 s: SCICLIENT: DMSC FW ABI revision 3.1 [MCU2_1] 3.557562 s: SCICLIENT: Init ... Done !!! [MCU2_1] 3.557582 s: UDMA: Init ... !!! [MCU2_1] 3.558653 s: UDMA: Init ... Done !!! [MCU2_1] 3.558694 s: MEM: Init ... !!! [MCU2_1] 3.558728 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ e2000000 of size 16777216 bytes !!! [MCU2_1] 3.558777 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 3640000 of size 262144 bytes !!! [MCU2_1] 3.558828 s: MEM: Created heap (DDR_NON_CACHE_ME, id=5, flags=0x00000000) @ d9000000 of size 117440512 bytes !!! [MCU2_1] 3.558873 s: MEM: Init ... Done !!! [MCU2_1] 3.558890 s: IPC: Init ... !!! [MCU2_1] 3.558934 s: IPC: 6 CPUs participating in IPC !!! [MCU2_1] 3.558972 s: IPC: Waiting for HLOS to be ready ... !!! [MCU2_1] 18.466728 s: IPC: HLOS is ready !!! [MCU2_1] 18.471706 s: IPC: Init ... Done !!! [MCU2_1] 18.471756 s: APP: Syncing with 5 CPUs ... !!! [MCU2_1] 18.471792 s: APP: Syncing with 5 CPUs ... Done !!! [MCU2_1] 18.471832 s: REMOTE_SERVICE: Init ... !!! [MCU2_1] 18.473127 s: REMOTE_SERVICE: Init ... Done !!! [MCU2_1] 18.473221 s: FVID2: Init ... !!! [MCU2_1] 18.473283 s: FVID2: Init ... Done !!! [MCU2_1] 18.473310 s: VHWA: DMPAC: Init ... !!! [MCU2_1] 18.473332 s: SCICLIENT: Sciclient_pmSetModuleState module=48 state=2 [MCU2_1] 18.473468 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_1] 18.473500 s: SCICLIENT: Sciclient_pmSetModuleState module=305 state=2 [MCU2_1] 18.473592 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_1] 18.473620 s: VHWA: DOF Init ... !!! [MCU2_1] 18.481387 s: VHWA: DOF Init ... Done !!! [MCU2_1] 18.481439 s: VHWA: SDE Init ... !!! [MCU2_1] 18.483739 s: VHWA: SDE Init ... Done !!! [MCU2_1] 18.483784 s: VHWA: DMPAC: Init ... Done !!! [MCU2_1] 18.483828 s: VX_ZONE_INIT:Enabled [MCU2_1] 18.483853 s: VX_ZONE_ERROR:Enabled [MCU2_1] 18.483874 s: VX_ZONE_WARNING:Enabled [MCU2_1] 18.484788 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DMPAC_SDE [MCU2_1] 18.484988 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DMPAC_DOF [MCU2_1] 18.485041 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!! [MCU2_1] 18.485072 s: APP: OpenVX Target kernel init ... !!! [MCU2_1] 18.485292 s: APP: OpenVX Target kernel init ... Done !!! [MCU2_1] 18.485330 s: UDMA Copy: Init ... !!! [MCU2_1] 18.486838 s: UDMA Copy: Init ... Done !!! [MCU2_1] 18.486892 s: APP: Init ... Done !!! [MCU2_1] 18.486917 s: APP: Run ... !!! [MCU2_1] 18.486937 s: IPC: Starting echo test ... [MCU2_1] 18.488870 s: APP: Run ... Done !!! [MCU2_1] 18.489714 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[.] C7X_1[.] [MCU2_1] 18.489811 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[.] [MCU2_1] 18.489888 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P] [MCU2_1] 18.637794 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P] [C6x_1 ] 3.684015 s: CIO: Init ... Done !!! [C6x_1 ] 3.684039 s: ### CPU Frequency = 1350000000 Hz [C6x_1 ] 3.684050 s: APP: Init ... !!! [C6x_1 ] 3.684059 s: SCICLIENT: Init ... !!! [C6x_1 ] 3.684249 s: SCICLIENT: DMSC FW version [21.5.0--v2021.05 (Terrific Llam] [C6x_1 ] 3.684262 s: SCICLIENT: DMSC FW revision 0x15 [C6x_1 ] 3.684272 s: SCICLIENT: DMSC FW ABI revision 3.1 [C6x_1 ] 3.684282 s: SCICLIENT: Init ... Done !!! [C6x_1 ] 3.684292 s: UDMA: Init ... !!! [C6x_1 ] 3.685482 s: UDMA: Init ... Done !!! [C6x_1 ] 3.685504 s: MEM: Init ... !!! [C6x_1 ] 3.685516 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ e4000000 of size 16777216 bytes !!! [C6x_1 ] 3.685533 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!! [C6x_1 ] 3.685549 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ e5000000 of size 50331648 bytes !!! [C6x_1 ] 3.685565 s: MEM: Init ... Done !!! [C6x_1 ] 3.685574 s: IPC: Init ... !!! [C6x_1 ] 3.685593 s: IPC: 6 CPUs participating in IPC !!! [C6x_1 ] 3.685606 s: IPC: Waiting for HLOS to be ready ... !!! [C6x_1 ] 14.768308 s: IPC: HLOS is ready !!! [C6x_1 ] 14.771700 s: IPC: Init ... Done !!! [C6x_1 ] 14.771727 s: APP: Syncing with 5 CPUs ... !!! [C6x_1 ] 18.471792 s: APP: Syncing with 5 CPUs ... Done !!! [C6x_1 ] 18.471808 s: REMOTE_SERVICE: Init ... !!! [C6x_1 ] 18.472472 s: REMOTE_SERVICE: Init ... Done !!! [C6x_1 ] 18.472510 s: VX_ZONE_INIT:Enabled [C6x_1 ] 18.472522 s: VX_ZONE_ERROR:Enabled [C6x_1 ] 18.472532 s: VX_ZONE_WARNING:Enabled [C6x_1 ] 18.473356 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!! [C6x_1 ] 18.473374 s: APP: OpenVX Target kernel init ... !!! [C6x_1 ] 18.473654 s: APP: OpenVX Target kernel init ... Done !!! [C6x_1 ] 18.473676 s: UDMA Copy: Init ... !!! [C6x_1 ] 18.476888 s: UDMA Copy: Init ... Done !!! [C6x_1 ] 18.476907 s: APP: Init ... Done !!! [C6x_1 ] 18.477582 s: APP: Run ... !!! [C6x_1 ] 18.477594 s: IPC: Starting echo test ... [C6x_1 ] 18.478785 s: APP: Run ... Done !!! [C6x_1 ] 18.479091 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[P] C7X_1[.] [C6x_1 ] 18.479123 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[P] C7X_1[P] [C6x_1 ] 18.489544 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P] [C6x_1 ] 18.637693 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P] [C6x_2 ] 3.784383 s: CIO: Init ... Done !!! [C6x_2 ] 3.784408 s: ### CPU Frequency = 1350000000 Hz [C6x_2 ] 3.784418 s: APP: Init ... !!! [C6x_2 ] 3.784426 s: SCICLIENT: Init ... !!! [C6x_2 ] 3.784613 s: SCICLIENT: DMSC FW version [21.5.0--v2021.05 (Terrific Llam] [C6x_2 ] 3.784627 s: SCICLIENT: DMSC FW revision 0x15 [C6x_2 ] 3.784637 s: SCICLIENT: DMSC FW ABI revision 3.1 [C6x_2 ] 3.784647 s: SCICLIENT: Init ... Done !!! [C6x_2 ] 3.784655 s: UDMA: Init ... !!! [C6x_2 ] 3.785837 s: UDMA: Init ... Done !!! [C6x_2 ] 3.785860 s: MEM: Init ... !!! [C6x_2 ] 3.785872 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ e8000000 of size 16777216 bytes !!! [C6x_2 ] 3.785889 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!! [C6x_2 ] 3.785904 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ e9000000 of size 50331648 bytes !!! [C6x_2 ] 3.785920 s: MEM: Init ... Done !!! [C6x_2 ] 3.785928 s: IPC: Init ... !!! [C6x_2 ] 3.785947 s: IPC: 6 CPUs participating in IPC !!! [C6x_2 ] 3.785960 s: IPC: Waiting for HLOS to be ready ... !!! [C6x_2 ] 15.719643 s: IPC: HLOS is ready !!! [C6x_2 ] 15.723172 s: IPC: Init ... Done !!! [C6x_2 ] 15.723199 s: APP: Syncing with 5 CPUs ... !!! [C6x_2 ] 18.471793 s: APP: Syncing with 5 CPUs ... Done !!! [C6x_2 ] 18.471807 s: REMOTE_SERVICE: Init ... !!! [C6x_2 ] 18.472473 s: REMOTE_SERVICE: Init ... Done !!! [C6x_2 ] 18.472512 s: VX_ZONE_INIT:Enabled [C6x_2 ] 18.472522 s: VX_ZONE_ERROR:Enabled [C6x_2 ] 18.472531 s: VX_ZONE_WARNING:Enabled [C6x_2 ] 18.473332 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!! [C6x_2 ] 18.473348 s: APP: OpenVX Target kernel init ... !!! [C6x_2 ] 18.473632 s: APP: OpenVX Target kernel init ... Done !!! [C6x_2 ] 18.473652 s: UDMA Copy: Init ... !!! [C6x_2 ] 18.476775 s: UDMA Copy: Init ... Done !!! [C6x_2 ] 18.476793 s: APP: Init ... Done !!! [C6x_2 ] 18.477329 s: APP: Run ... !!! [C6x_2 ] 18.477340 s: IPC: Starting echo test ... [C6x_2 ] 18.478432 s: APP: Run ... Done !!! [C6x_2 ] 18.478693 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[x] C66X_2[s] C7X_1[P] [C6x_2 ] 18.479087 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[P] [C6x_2 ] 18.489562 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P] [C6x_2 ] 18.637726 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P] [C7x_1 ] 4.003909 s: CIO: Init ... Done !!! [C7x_1 ] 4.003923 s: ### CPU Frequency = 1000000000 Hz [C7x_1 ] 4.003934 s: APP: Init ... !!! [C7x_1 ] 4.003941 s: SCICLIENT: Init ... !!! [C7x_1 ] 4.004114 s: SCICLIENT: DMSC FW version [21.5.0--v2021.05 (Terrific Llam] [C7x_1 ] 4.004128 s: SCICLIENT: DMSC FW revision 0x15 [C7x_1 ] 4.004137 s: SCICLIENT: DMSC FW ABI revision 3.1 [C7x_1 ] 4.004148 s: SCICLIENT: Init ... Done !!! [C7x_1 ] 4.004156 s: UDMA: Init ... !!! [C7x_1 ] 4.005032 s: UDMA: Init ... Done !!! [C7x_1 ] 4.005043 s: MEM: Init ... !!! [C7x_1 ] 4.005053 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ 100000000 of size 268435456 bytes !!! [C7x_1 ] 4.005075 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 8159232 bytes !!! [C7x_1 ] 4.005093 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 491520 bytes !!! [C7x_1 ] 4.005109 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!! [C7x_1 ] 4.005126 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ ec000000 of size 268435456 bytes !!! [C7x_1 ] 4.005144 s: MEM: Init ... Done !!! [C7x_1 ] 4.005151 s: IPC: Init ... !!! [C7x_1 ] 4.005163 s: IPC: 6 CPUs participating in IPC !!! [C7x_1 ] 4.005177 s: IPC: Waiting for HLOS to be ready ... !!! [C7x_1 ] 17.229429 s: IPC: HLOS is ready !!! [C7x_1 ] 17.231411 s: IPC: Init ... Done !!! [C7x_1 ] 17.231425 s: APP: Syncing with 5 CPUs ... !!! [C7x_1 ] 18.471793 s: APP: Syncing with 5 CPUs ... Done !!! [C7x_1 ] 18.471812 s: REMOTE_SERVICE: Init ... !!! [C7x_1 ] 18.472149 s: REMOTE_SERVICE: Init ... Done !!! [C7x_1 ] 18.472170 s: VX_ZONE_INIT:Enabled [C7x_1 ] 18.472182 s: VX_ZONE_ERROR:Enabled [C7x_1 ] 18.472192 s: VX_ZONE_WARNING:Enabled [C7x_1 ] 18.472437 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!! [C7x_1 ] 18.472450 s: APP: OpenVX Target kernel init ... !!! [C7x_1 ] 18.472534 s: APP: OpenVX Target kernel init ... Done !!! [C7x_1 ] 18.472550 s: APP: Init ... Done !!! [C7x_1 ] 18.472561 s: APP: Run ... !!! [C7x_1 ] 18.472570 s: IPC: Starting echo test ... [C7x_1 ] 18.473085 s: APP: Run ... Done !!! [C7x_1 ] 18.478705 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[x] C66X_2[P] C7X_1[s] [C7x_1 ] 18.479090 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[P] C7X_1[s] [C7x_1 ] 18.489582 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s] [C7x_1 ] 18.637754 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s] [ 128.369269] Initializing XFRM netlink socket [ 133.855976] process 'docker/tmp/qemu-check358187907/check' started with executable stack
