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AM3352: How to use "Integrated 15- to 35-MHz High-Frequency Oscillator

Part Number: AM3352

Hi experts,

Does the "Integrated 15- to 35-MHz High-Frequency Oscillator" below mean that it can generate, for example, a 19.2-MHz clock and input it to each PLL?

Excerpt from the data sheet (SPRS717L) "1.1 Features- Clocks
- Clocks
- Integrated 15- to 35-MHz High-Frequency Oscillator Used to Generate a Reference Clock for Various System and Peripheral Clocks.

If it can, could you please tell me which registers (frequency setting, enable, etc.) are used to use as an internal oscillator?

Best regards,
O.H

  • The oscillator itself support a frequency range of 15 to 35 MHz, but the SOC only supports four frequencies. Please refer to the Clock Specifications section of the datasheet and the Power, Reset, and Clock Management section of the TRM for more information.

    The oscillator is enabled by default, so you only need to connect the appropriate crystal circuit components to the AM335x device to generate a valid reference clock for the SOC.

    SYSBOOT[15:14] inputs are used to tell the AM335x device which reference clock frequency is being used. Software will use this information to configure all of the PLLs to produce the appropriate internal clock frequencies.

    Regards,
    Paul

  • Hi Paul,

    Thank you for your reply.

    The oscillator itself support a frequency range of 15 to 35 MHz, but the SOC only supports four frequencies. Please refer to the Clock Specifications section of the datasheet and the Power, Reset, and Clock Management section of the TRM for more information.

    The oscillator is enabled by default, so you only need to connect the appropriate crystal circuit components to the AM335x device to generate a valid reference clock for the SOC.

    I thought it had a built-in oscillator capable of generating frequencies from 15 to 35 MHz without a reference (e.g. crystal oscillator), but I understood that a reference is required and the supports only 4 frequencies (19.2 MHz, 24 MHz, 25 MHz, 26 MHz).

    Sorry, let me check one additional thing. I have confirmed that the PerPLL clock is fixed (does not change) even when the input to the Master clock (CLK_M_OSC) is intentionally changed.

    Is this expected behavior? Since PerPLL divides and outputs based on the master clock, I thought that if master is changed, the output clock of PerPLL should also change, but is the internal oscillator adjusting?

    Best regards,
    O.H

  • The PerPLL must output the same frequency to all of the peripherals for each of the four reference clock frequencies. Otherwise, the signal rates of the peripherals would not be the correct frequency and they would not be able to communicate with attached devices.

    Software will change the PerPLL pre-divider, multiplier, and post-dividers as necessary to generate the expected output frequency with each of the reference clock frequencies. This is why we only support four reference clock frequencies and your design must set the SYSBOOT[15:14] inputs to the appropriate value that represents the actual reference clock frequency connected to the AM335x device.

    Regards,
    Paul