EVM5505 3.3V Memory Daughter Card

Hi,

The website will be updated.

In the mean time, you can add the following code to your gel file to use the 3.3V memory card.

#define EMIF_CNTL              0x1C33
#define EMIF_ASYNC_WAIT_0        0x1004
#define EMIF_ASYNC_WAIT_1        0x1005
#define EMIF_ASYNC1_CONFIG_0     0x1010
#define EMIF_ASYNC1_CONFIG_1     0x1011
#define EMIF_ASYNC2_CONFIG_0     0x1014
#define EMIF_ASYNC2_CONFIG_1     0x1015
#define EMIF_ASYNC3_CONFIG_0     0x1018
#define EMIF_ASYNC3_CONFIG_1     0x1019
#define EMIF_ASYNC4_CONFIG_0     0x101C
#define EMIF_ASYNC4_CONFIG_1     0x101D
#define EMIF_NAND_CTRL           0x1060
#define EMIF_NAND_STATUS         0x1064
#define EMIF_PAGEMODCTRL0   0x1068
#define EMIF_PAGEMODCTRL1   0x1069

menuitem "EMIF_Configuration";
hotmenu EMIF_3_3_INIT() {
    /* Config EMIF - System Control Regsiter, 16bit mode */
    *(short *)EMIF_CNTL@IO =0;

    /*for SRAM in memory card (Async_CE1)*/
    /* Config EMIF - ASYNC Regsiters */
    *(short *)EMIF_ASYNC_WAIT_0@IO =0x0080;
    *(short *)EMIF_ASYNC_WAIT_1@IO =0x00E4;

 /* Configure as 16-bit data bus */   
    /* Async4 ==> Async_CE1 (SRAM)*/ 
    *(short *)EMIF_ASYNC4_CONFIG_0@IO =0x40AD;
    *(short *)EMIF_ASYNC4_CONFIG_1@IO =0x0020;

    /* Async3 ==> Async_CE0(Flash)*/
    *(short *)EMIF_ASYNC3_CONFIG_0@IO =0xFFFD;
    *(short *)EMIF_ASYNC3_CONFIG_1@IO =0x3FFF;

    *(short *)EMIF_ASYNC2_CONFIG_0@IO =0xFFFD;
    *(short *)EMIF_ASYNC2_CONFIG_1@IO =0x3FFF;

 *(short *)EMIF_ASYNC1_CONFIG_0@IO =0xFFFD;
    *(short *)EMIF_ASYNC1_CONFIG_1@IO =0x3FFF;

 /*do not assign Async_CE0 and Async_CE1 for NAND*/
    *(short *)EMIF_NAND_CTRL@IO =0x3101;

    /* Turn off page mode for all Chip Selects*/
    *(short *)EMIF_PAGEMODCTRL0@IO =0xFCFC;
    *(short *)EMIF_PAGEMODCTRL1@IO =0xFCFC;
    GEL_TextOut("EMIF Initilization for 3.3V card is complete.\n");
}

Best Regards,

Peter Chung

Peter,

Are these changes required to get the CSL examples to work correctly?

Thanks,
Tom

Hello Peter,

I tried making the changes in the GEL file but without success...

When I try loading a section into SRAM I get error message "data verification failed at address 0x800000. Please verify target memory and memory map."

As I see from the schematics of 3.3V Memory card SRAM is connected to EMIF CS2 which should be mapped to 0x800000h. I think that part I'm doing right. Please find attached my CMD file (taken from the CSL examples)

Thank you

Tom,

It is not required to the CSL examples to work. The CSL examples should work without this change.

Thanks,

Peter Chung

Peter,

Any info on my problem?

Can you recommend me a solution, I have been trying this for the whole day and can't seem to make any progress. I cannot load anything into SRAM on the memory daughter card :(

I am booked until 5 pm this afternoon, but I will get you updated within today. 

Peter Chung

Great! Thank you for letting me know.

Regards,

Peter Chung