In all my previous usage of SPI ports they were all implemented as full duplex devices so you could transfer data in both directions at the same time using one charter worth of clock. When the master wanted to transfer data to the slave in also transferred the same number of bits from the slave. This is due to the circular shift registers used in the SPI implementation.
In the C5505 DSP the SPI implementation suggests that it is a half duplex device. Looking at Application note SPRUFO3 there are only two commands for transferring data across the SPI device command 1 for READ and command 2 for WRITE command 3 is reserved. Also the software examples for transferring data, Figure 10 on page 17, are written to only read or write data not do both on the same frame.
When using devices like a SPI EEPROM it is true that a half duplex exchange of data is all that is needed but when transferring data between two processors a full duplex exchange can double the data transfer.
When the SPI is used as an inter processor port and both device want to transfer data it is unclear to me how the slave device knows the difference between a master write and a master read. I also do not understand the functional differences between command 1 READ and command 2 WRITE with the respect of the three SPI lines MOSI, MISO and SCLK