TDA4VM: Through warm reset MCU_PSRAM0_RAM of the previous segment will not be preserved

Kangjia Dong

Intellectual 2015 points

Part Number: TDA4VM

Dear expert,

According to this link https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1008072/tda4vm-ocm-data-retention-after-reset/3726546?tisearch=e2e-sitesearch&keymatch=PSRAM#3726546

MCU_PSRAM0_RAM 0x0040280000 0x00402801FF 512 B will reserved the value after warm reset. But I test this on TDA4VM and find it can't reserved the PSRAM0 of previous segment.

Test environment: SDK7.3 + SPL boot + SD card boot media

1. Use CCS to view memory before warm reset show as below

2.Through CCS set the memory of start address 0x0040280000 to zero

3. run warm reset code on MCU1_0 succeed show as below

    volatile uint32_t enableDebug = 1;
    do
    {
    }while (enableDebug);
    int32_t status =CSL_PASS;
    status = Sciclient_pmDeviceReset(SCICLIENT_SERVICE_WAIT_FOREVER);
    if(status==CSL_PASS)
    {
        printf("Reset completed, but this is not reset!!!\n");
    }
    else{
        printf("Reset failed!!!\n");
    }

4.After warm reset the memory of value show as below

It looks like this memory was changed after a warm reset. Is there some program using this memory space? Is have other memory space can reserved value after warm reset?

over 2 years ago

0 Brijesh Jadav over 2 years ago

TI__Guru**** 433145 points

Hi,

Is the power supply at valid levels during this reset? Yes, this is only RAM 512B, which can retain its value across warm resets, as long as power supply is at correct levels.

Regards,

Brijesh

0 Kangjia Dong over 2 years ago in reply to Brijesh Jadav

TI__Intellectual 2015 points

Hi Brijesh,

I test this on TDA4EVM board. How to ensure the power supply at valid levels during this reset?

Is this mean the power light on?

0 Brijesh Jadav over 2 years ago in reply to Kangjia Dong

TI__Guru**** 433145 points

Hi kcastille,

Could you please help on this question?

Regards,

Brijesh

0 Kangjia Dong over 2 years ago in reply to Brijesh Jadav

TI__Intellectual 2015 points

Hi Brijesh,

I find this these memory region may be will used when boot with SPL.

ti-processor-sdk-linux-j7-evm-07_03_00_05/board-support/u-boot-2020.01+gitAUTOINC+2781231a33-g2781231a33/board/ti/common/board_detect.h

/**
 * struct ti_common_eeprom - Null terminated, usable EEPROM contents.
 * header:  Magic number
 * @name:   NULL terminated name
 * @version:    NULL terminated version
 * @serial: NULL terminated serial number
 * @config: NULL terminated Board specific config options
 * @mac_addr:   MAC addresses
 * @emif1_size: Size of the ddr available on emif1
 * @emif2_size: Size of the ddr available on emif2
 */
struct ti_common_eeprom {
    u32 header;
    char name[TI_EEPROM_HDR_NAME_LEN + 1];
    char version[TI_EEPROM_HDR_REV_LEN + 1];
    char serial[TI_EEPROM_HDR_SERIAL_LEN + 1];
    char config[TI_EEPROM_HDR_CONFIG_LEN + 1];
    char mac_addr[TI_EEPROM_HDR_NO_OF_MAC_ADDR][TI_EEPROM_HDR_ETH_ALEN];
    u64 emif1_size;
    u64 emif2_size;
};
#define TI_EEPROM_DATA ((struct ti_common_eeprom *)\
                TI_SRAM_SCRATCH_BOARD_EEPROM_START)

0 Brijesh Jadav over 2 years ago in reply to Kangjia Dong

TI__Guru**** 433145 points

Hi Dong,

I am checking with our SPL expert to see if this structures are allocated from this SRAM.

Regards,

Brijesh

+1 Brijesh Jadav over 2 years ago in reply to Brijesh Jadav

TI__Guru**** 433145 points

Hi Kangjia Dong,

Yes, this data structure is the one, which is stored in this RAM.

/**
* struct ti_common_eeprom - Null terminated, usable EEPROM contents.
* header: Magic number
* @name: NULL terminated name
* @version: NULL terminated version
* @serial: NULL terminated serial number
* @config: NULL terminated Board specific config options
* @mac_addr: MAC addresses
* @emif1_size: Size of the ddr available on emif1
* @emif2_size: Size of the ddr available on emif2
*/
struct ti_common_eeprom {
u32 header;
char name[TI_EEPROM_HDR_NAME_LEN + 1];
char version[TI_EEPROM_HDR_REV_LEN + 1];
char serial[TI_EEPROM_HDR_SERIAL_LEN + 1];
char config[TI_EEPROM_HDR_CONFIG_LEN + 1];
char mac_addr[TI_EEPROM_HDR_NO_OF_MAC_ADDR][TI_EEPROM_HDR_ETH_ALEN];
u64 emif1_size;
u64 emif2_size;
};

#define TI_EEPROM_DATA ((struct ti_common_eeprom *)\
TI_SRAM_SCRATCH_BOARD_EEPROM_START)

/* MCU SCRATCHPAD usage */
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START CONFIG_SYS_K3_MCU_SCRATCHPAD_BASE

config SYS_K3_MCU_SCRATCHPAD_BASE
hex
default 0x40280000 if SOC_K3_AM6
default 0x40280000 if SOC_K3_J721E
default 0x40280000 if SOC_K3_J721S2
help
Describes the base address of MCU Scratchpad RAM.

Regards,

Brijesh

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TDA4VM: Through warm reset MCU_PSRAM0_RAM of the previous segment will not be preserved