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TMS320C6678: Question about TMS320C6678

Jimmy Huang
Genius 4095 points

Part Number: TMS320C6678

Hello：

The data manual is obtained from the web page, which refers to many reference design documents. Appropriate references will be selected in the subsequent design, but some problems need to be consulted by familiar experts in the finalization stage.

1. When it comes to supporting T 800 Mega transfers per second (MTS), 1066 MTS, 1333 MTS, and 1600 MTS, 8g byte addressable memory space, is there a list of recommended DDR3?

2.16-bit EMIF supports nor or NAND flash? What is the specific interface? Does QSPI Flash support?

3. Can boot be from flash? Do you support downloading codes from the Internet?

4. Does the network coprocessor support L2 layer protocol?

5. Can you provide the maximum power consumption? Where can I get the power estimation spreadsheet?

6. Is CCS development tool available? Is there a ready-made driver for the hardware interface?

7. Is there a reference design for the selection of power supply and power on timing?

8. Are there guidance documents for hardware design and wiring?

At present, TI's TMS320C6678 DSP is used in the design scheme of the customer's project. This is a product around 2014. Is there a shutdown plan or new replacement?Thanks

  • 0
    Guru 13202 points

    Hello!

    1. I would refer DDR3 calculation spreadsheet to see memory devices listed there.

    2. Data sheet says it for both NAND and NOR devices. It is essentially 16 bit parallel interface, so QSPI memories are not compatible with it.

    3. Yes, there is EMIF16 boot mode. No, there is no direct boot from Internet, however, this device still can boot over Ethernet interface.

    4. Network accelerator supports some L2, but you'd better see coprocessor documentation.

    5. I would see power consumption spreadsheet.

    6. CCS is provided for free starting with 7.x version.

    7. Most people try to follow evaluation board design. It is somewhat old, so instead of FPGA one may opt for MCU module for supervision and sequencing.

    8. One may find routing requirements for critical peripherals like DDR3, PCIe in respective manuals. Be sure to read more about DDR3 as its controller does not start well at full speed, so workaround is to use 2 step loading, when 1 stage loads to L2, DDR3 properly initialized, calibrated and switched to top speed, then second stage loaded allowing DDR3 space to be used as well.

    Hope this helps.

  • 0 in reply to Victor Kazmirenko
    TI__Expert 4314 points

    Hi Jimmy,

    I believe Victor's response solved your issue.

    Thanks,

    Rajarajan U