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C5505 Timer problem

Other Parts Discussed in Thread: TMS320C5505

Hello,

 

I am trying to get one of the demo programs for the TMS320C5505 evaluation board running, but I am having some trouble. I modified the Timer example (\EVMC5505\example\gpt\) to run the timer in autoreload mode.

I changed only timer configuration to hwConfig.autoLoad = GPT_AUTO_ENABLE;

but the ISR of the time runs only one time.

What could I do to run the Timer in autoreload mode?

I am using Code Composer Studio  Version: 3.3.8 which is the one that came on the CD that was in the Box.

 

Thank you.

  • Hi,

    It seems that you did not clear the timer interrupt flag in the timer isr. You should clear corresponding interrupt flag to be able to get the next one. The same rule should be applied to DMA interrupt flags, too.

    If you need further assistance,  would you please upload the whole project with source code? I will take a look at it.

    Best Regards,

    Peter Chung

     

  • Thank you for the feedback Peter,

     you can download whole project here.

    I hope you can solve my problem...

    Best Regards,

    Peter

  • Hello again,

    I chnged my ISR, but no success. Ipost my code here. There are two different ISR's for the timer, a simple one and by using of CSL...

     

     

    #include "csl_gpt.h"
    #include "csl_intc.h"
    #include <stdio.h>

    /*  CPU register declaration*/
    #define IER0        *(volatile unsigned *)0x0000
    #define IFR0        *(volatile unsigned *)0x0001
    #define ST0_55      *(volatile unsigned *)0x0002
    #define ST1_55      *(volatile unsigned *)0x0003
    #define ST3_55      *(volatile unsigned *)0x0004
    #define IER1        *(volatile unsigned *)0x0045
    #define IFR1        *(volatile unsigned *)0x0046

    /*  Timer register declaration*/
    #define CPU_TIM0_CTRL ((ioport volatile unsigned*)0x1810)
    #define CPU_TIM0_PLWR ((ioport volatile unsigned*)0x1812)
    #define CPU_TIM0_PHWR ((ioport volatile unsigned*)0x1813)
    #define CPU_TIM0_CLWR ((ioport volatile unsigned*)0x1814)
    #define CPU_TIM0_CHWR ((ioport volatile unsigned*)0x1815)
    #define CPU_TIM0_IER ((ioport volatile unsigned*)0x1816)
    #define CPU_TIMINT_AGGR ((ioport volatile unsigned*)0x1c14)
    #define CPU_PRCR ((ioport volatile unsigned*)0x1c05)

    extern void VECSTART(void);
    CSL_GptObj        gptObj;
    Uint16            hitIsr;
    CSL_Handle    hGpt;
    CSL_Status     status;


    /*
     This is interrupt sub-routin,
     In the occorance of interrupt
     this function will tigger.
    */
    void Timer_isr1(void)
    {
        ioport  volatile Uint16 *iafrReg;
        IRQ_clear(TINT_EVENT);
        /* Reset Interrupt Aggregation Flag Registers          */
        iafrReg = (ioport  volatile Uint16 *)CSL_IAFR_REGS;
        switch(hGpt->Instance)
        {
            case GPT_0:
                (*iafrReg) = CSL_IAFR_TIMER_FLAG_0_RESETVAL;
                break;
            case GPT_1:
                (*iafrReg) = CSL_IAFR_TIMER_FLAG_1_RESETVAL;
                break;
            case GPT_2:
                (*iafrReg) = CSL_IAFR_TIMER_FLAG_2_RESETVAL;
                break;
            default:
                (*iafrReg) = CSL_IAFR_TIMER_FLAG_0_1_2_RESETVAL;
        }
        printf("ISR Success\n");   
    }




    void Timer_isr2(void)
    {
        // clear timer int flag
        IFR0 = IFR0&0x0010;
       
        /*  clear timer0 int flag*/
        *CPU_TIM0_IER = 0x0001;
           
        /*    Clear Timer0 bit in Timer Aggregate register*/
        *CPU_TIMINT_AGGR = *CPU_TIMINT_AGGR | 0x0001 ;   
        printf("ISR Success\n");
    }




    void gpt_IntcSample(void)
    {
        CSL_Config     hwConfig;
       
        IRQ_clear(TINT_EVENT);

        hGpt = (CSL_GptObj *)GPT_open (GPT_0, &gptObj, &status);
        GPT_reset(hGpt);

        IRQ_setVecs((Uint32)(&VECSTART));
        IRQ_plug(TINT_EVENT, &Timer_isr2);
        IRQ_enable(TINT_EVENT);
       
        hwConfig.autoLoad         = GPT_AUTO_ENABLE;
        hwConfig.ctrlTim         = GPT_TIMER_ENABLE;
        hwConfig.preScaleDiv     = GPT_PRE_SC_DIV_0; 
        hwConfig.prdLow         = 0xFFFF;
        hwConfig.prdHigh         = 0x0000;

        GPT_config(hGpt, &hwConfig);
        GPT_start(hGpt);
    }


    /*
     The main function
    */
    void main()
    {
        IRQ_globalDisable();
        gpt_IntcSample();
        IRQ_globalEnable();

        while(1);
    }

     

    Any ideas?

    Regards,

    Peter

  • Hello Peter,

    Add the keyword  " interrupt "  for your timer ISR.

    interrupt void Timer_isr2(void)

    {

        . . . .

    }

    This should fix the issue.

     

    Regards,

    Pratap.

  • Peter,

    Pratap is right. You should use "interrupt" directive for the isr functions. By the way, CPU_TIM0_IER ((ioport volatile unsigned*)0x1816) does not exist. You should not use the register. It appears that the code you have was written long ago.

    I have a good news for you. We have just released the C5505/04 CSL. The CSL has lots of examples that you can use. Please get the CSL from: http://focus.ti.com/docs/toolsw/folders/print/sprc133.html

    Best Regards,

    Peter Chung

     

     

  • Hello,

    it works!

    Thank you for support!

    best Regards,

    Peter