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AM35XX Ibis Model - SDRC inputs

Russell Cumber
Prodigy 100 points

The ibis model shows 6 options for the SDRC interface when configured as an input.  Which one should be used for simulations or how can I tell which one is active?

|*****************************************************************************************
|     Usage IO#1.8V#FULL_SSTL/HALF_SSTL/NONE_SSTL#FAST#BSSTL18TCSCGPBFZ_7LM.PAD
|     Base model BSSTL18TCSCGPBFZ_7LM
|*****************************************************************************************
[Model Selector] Selector_16
Model_100 INPUT,1.8V,HALF_SSTL,+-10%V
Model_102 3-STATE,1.8V,PI,FAST,+-10%V
Model_104 INPUT,1.8V,FULL_SSTL,+-10%V
Model_107 INPUT,1.8V,NONE_SSTL,+-10%V
Model_113 INPUT,1.8V,HALF_SSTL,+-0.1V
Model_115 3-STATE,1.8V,PI,FAST,+-0.1V
Model_117 INPUT,1.8V,FULL_SSTL,+-0.1V
Model_120 INPUT,1.8V,NONE_SSTL,+-0.1V

  • 0
    TI__Genius 9190 points

    Hello Russell,

    Are you just wanting to simulate this to make sure you have good signal intetrity for the SDRC pins?  If so, I would strongly recommend that you just follow the routing guidelines we have in the Data manual because it is very difficult to get all of the variables correct for the environment on the SDRC pins.  If you follow our guidelines then you are guaranteed to be well within spec. 

  • 0
    TI__Genius 9190 points

    Russell Cumber said:

    The ibis model shows 6 options for the SDRC interface when configured as an input.  Which one should be used for simulations or how can I tell which one is active?

    |*****************************************************************************************
    |     Usage IO#1.8V#FULL_SSTL/HALF_SSTL/NONE_SSTL#FAST#BSSTL18TCSCGPBFZ_7LM.PAD
    |     Base model BSSTL18TCSCGPBFZ_7LM
    |*****************************************************************************************
    [Model Selector] Selector_16
    Model_100 INPUT,1.8V,HALF_SSTL,+-10%V
    Model_102 3-STATE,1.8V,PI,FAST,+-10%V
    Model_104 INPUT,1.8V,FULL_SSTL,+-10%V
    Model_107 INPUT,1.8V,NONE_SSTL,+-10%V
    Model_113 INPUT,1.8V,HALF_SSTL,+-0.1V
    Model_115 3-STATE,1.8V,PI,FAST,+-0.1V
    Model_117 INPUT,1.8V,FULL_SSTL,+-0.1V
    Model_120 INPUT,1.8V,NONE_SSTL,+-0.1V

    You need to select the correct model for your simulation.  There are 6 different options for input.  The last value signifies the power supply tolerance that you designed in your system.  If you designed the 1.8V supply within +-10% then you need to use the first set of models and if you design is designed to +-0.1v then you need to use the second set.  After that, you choose the one based on how you have the termination set, full, half, or none.

  • 0 in reply to Jeff Culverhouse
    Guru 10570 points

    Hello, Jeff.

    Thank you very much for your information.
    Could you let me know about additional informations?

     - How can I decide termination set?
      (Is it mean the ddr drive strength which is set by SDRAM_CONFIG reg?)

    If yes,
     - Is it correct following understanding?
       a) full : SDRAM_CONFIG.REG_SDRAM_DRIVE=0 (full drive strength)
       b) half : SDRAM_CONFIG.REG_SDRAM_DRIVE=1 (1/2 drive strength)
       c) none : There is no setting on AM35x DDR I/F

     - What is the mean of "PI,FAST" word?

    The trivial infomation is helpful much for me.
    Thank you in advance.

    Best regards,
    RY

  • 0 in reply to RY9983
    Guru 10570 points

    Hello.

    Since I have found some informations about this, I would like to report them.

    - about PI:
      I have found the answer from below url.
      PI : Pull Inhibited.
      http://e2e.ti.com/support/dsp/sitara_arm174_microprocessors/f/416/t/95894.aspx

    - about full, half, none:
    I have found Termination settings on TRM(SPRUgr0b : P774).
      CONTROL_DEVCONF3.DDR_CONFIG_TERMOFF
      CONTROL_DEVCONF3.DDR_CONFIG_TERMOFF

    Although I do not know about detail of this, I would like to choose the selector depend on this termination register setting.
    Thank you very much.