As per note 9, page 8 in DM, TDA4xH supports 1x4L or 2x2L option but Table 5-1 shows TDA4xH supports 2x4L or 4x2L options ?
We have considered as per note 9 and used 2x2L PCIE option, and the following signals are considered;
– PCIE0 Lane 0 and Lane 1
– PCIE1 Lane 0 and Lane 1
Please confirm the same.
Reference Schematic: J784S4X Evaluation Board
Rev: E2
Ver: 3.1
File Name: PROC141E2(001)_SCH
Reference: DM- Note 9 (Page 8) and Table 5-1 (Page 7)
