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SPI bootloader settings for McBSP0 on C5506

Brian Willoughby
Genius 4630 points

Other Parts Discussed in Thread: TMS320VC5506

There is ample documentation of the reset values for all registers of McBSP0. The bootloader documentation implies that the clock stop mode is set and that CLKGDV is set to 243 (which divides the clock by 244 as mentioned in the text). I would like to see a comprehensive list of the McBSP0 register settings that differ between reset and SPI bootloader operation. Is this available somewhere?

I am responsible for both hardware and firmware design on a project based around the TMS320VC5506. We have a first revision of the hardware, but unfortunately the GPIO pins are hard-wired to 16-bit SPI boot mode, and I have an ATMEL Flash on board which has 24-bit addressing. Thus, I won't be able to test the actual bootloader without rewiring the board and spending some time. What I have been doing instead is to simply test the Flash by reading and writing data, and it works well at 66 MHz with CLKXP_FALLING (which is not the reset default). This has me worried that the chip may not be readable with the reset default settings for the registers. I know that the bootloader makes some changes to the reset defaults for McBSP0, otherwise it wouldn't be working in SPI clock stop mode, but I'd like to know everything that is changed. I suppose I could disassemble the ROM, but that seems like a time-consuming option.

Any help or pointers would be appreciated.

  • 0
    TI__Guru*** 125430 points

    Brian,

    I'm a bit concerned by your post -- you mention that you have an Atmel flash device on board.  The 5506 does not have a boot mode that enables you to boot from SPI flash.  The bootmode is to boot from SPI EEPROM.  Generally a SPI flash requires you to issue a read command (0x3) prior to actually reading out any of the data whereas with an EEPROM you would directly read the data without having to issue a read command.  That said, I don't think you will be able to boot from that device.

    You may want to check out this wiki page:

    http://wiki.davincidsp.com/index.php?title=Hardware_Design_Checklist

    You always want to give yourself some population options for the bootmodes so you don't get stuck in this sort of situation.  Use pullups/pulldowns instead of tying signals directly to Vcc/ground.  That way you can give yourself population options for both rails so that you can make changes if necessary, sometimes it's nice just for development.

    With regard to the register settings during the various boot modes, the best/easiest thing to do is to simply connect with an emulator and look at the McBSP registers.  For non SPI bootmodes (e.g. I2C boot) I expect to see the McBSP in its default/reset state, whereas for the SPI bootmodes you can see exactly how it is configured differently.  I'm traveling right now or else I would have attempted this simple test on an EVM...

    Brad

  • 0 in reply to Brad Griffis
    Genius 4630 points

    Thanks!  I read SPRAB14 before designing the board, but did not know about the Wiki Hardware Design Checklist.

    As for the Flash, I'm referencing SPRA375F, which states that the DSP issues a READ instruction (03h) for both the 16-bit and 24-bit SPI bootloader modes. The ATMEL chip I'm using - the AT45DB011D - supports this command with the same interface timing as shown in the bootloader documentation.  Seems like this particular Flash should be compatible with the 5506 bootloader, although I will heed your warning and design pads on the board for an EEPROM as well.

    I have already revised the board for GPIO option jumpers since I have spare pullups on the first revision. This should allow 0-ohm jumpers to configure for different modes. I'd like to enable the USB Bootloader as an option, just in case that proves useful in the end product.

    Finally, regarding your advice about just reading the register settings via the emulator, I am concerned because I can't be sure whether the bootloader runs or not.  In other words, when the emulator resets the DSP, does it allow the bootloader code to run? I was assuming that the emulator stops the DSP before it runs the bootloader, and thus the McBSP0 registers would be at their reset state and not at their bootloader state. The emulator shows DSP ROM memory at FF8000, which I assume is before the bootloader is even selected. I suppose I could step through the bootloader code and watch for any register changes. There will be at least some settings changes to put McBSP0 into clock stop mode and change CLKGDV.

    Please advise as to whether the emulator presents the Reset state of the McBSP0 registers or the Bootloader state.

  • 0 in reply to Brian Willoughby
    TI__Guru*** 125430 points

    Brian,

    Sorry, perhaps I shouldn't work this late!  I have crossed out my comment from the last post as I believe it was just plain wrong.  I looked back at that document and you're right, it does specifically mention sending a 0x3 command to put the device in read mode, so I think you're most likely ok.

    When you do Debug -> Connect in CCS the processor should halt, though it should not be reset.  Everything should reflect the state of the processor at the moment you halted it.  (Note, you should probably remove your gel file in your cc_setup when doing this experiment so it doesn't "interfere" with anything.)

    Your procedure might be something like this:

    • Power on board and allow it to boot (or attempt to boot for your current board)
    • Connect the emulator (Debug -> Connect)
    • Look at McBSP registers -- they should be in the state as configured by the bootloader.

    Brad

  • 0 in reply to Brad Griffis
    Genius 4630 points

    Thanks for the suggestion. I decided to just call up the McBSP0 register window and step through the Bootloader ROM while watching for changes to appear in red. It was a little bothersome to step through the time delays, but I got all of the register settings and even reached the point where the SPI Bootloader issues the Command 03.

    For those who might be interested, the differences between SPI Bootloader versus the Reset defaults for McBSP0 are as follows (note that this is only verified for the current revision of the 5506 and may not always be the same in the future or for other models):

    SPCR1_CLKSTP_DELAY

    SPCR2_FREE_YES

    RCR2_RDATDLY_1BIT

    XCR2_XDATDLY_1BIT

    SRGR1_FWID=1, _CLKGDV=243

    PCR_FSXM_INTERNAL, _CLKXM_OUTPUT, _FSXP_ACTIVELOW, _FSRP_ACTIVELOW, _CLKRP_RISING

  • 0 in reply to Brian Willoughby
    TI__Guru*** 125430 points

    Thanks for posting this info back to the community.  I'm sure that will help others too.  This info applies to 5503, 5506, 5507, 5509A.  There won't be any new revs of these devices, so this info should always be good.