TDA4VM: PMIC can't reset when GPIO7 pull-down

lu xiangyu

Part Number: TDA4VM

Hi expert，

Our board is j721e-evm and sdk is 8.0 prebuilt。

SW2: 1-off, 2-on

SW3: 1-on, 2-off

We are using the watchdog0. When the timeout occurs, we detected low-level output from SOC_SAFETY_ERRORn and low-level output from PIN 4 of U98 to GPIO7 of PMIC, but the system did not restart.

We checked the PMIC ESM_MCU_EN register configuration and it seems to be correct.

Is there anything else I should pay attention to?

Thank you for your reply!

LuXiangyu

over 3 years ago

0 Kevin S over 3 years ago

TI__Mastermind 38340 points

Hi,

Is the understanding correct that you observe no change in voltage level of H_SOC_PORz and H_MCU_PORz as a result of the watchdog timeout?

Thanks,
Kevin

0 Bill McCracken over 3 years ago

TI__Expert 6965 points

If you are trying to test the PMIC's Watchdog timer, then the SW2: position 2 = Off in order to enable watchdog timer. Please see highlighted SCH pg notes below.

0 lu xiangyu over 3 years ago in reply to Bill McCracken

Prodigy 70 points

Hi,

We are testing watchdog0 for A72, which connected the ESM module and sends a SOC_SAFETY_ERRORn signal to PMIC through the ESM.

So I think we should turn off the watchdog of Pmic itself (SW2: position 2 = on), do I understand correctly?

Thanks,

LuXiangyu

0 lu xiangyu over 3 years ago

Prodigy 70 points

Hi,

Is there any progress on this issue? Thanks for your reply!

Best Regards,

LuXiangyu

0 lu xiangyu over 3 years ago in reply to Kevin S

Prodigy 70 points

Hi,

Yes, you understand correctly, both of H_SOC_PORz and H_MCU_PORz are 1.8V when the watchdog timeout (PMIC GPIO7 is low level).

Thanks,

LuXiangyu

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TDA4VM: PMIC can't reset when GPIO7 pull-down