66AK2H12: Timer reset bit

Nancy Wang

Expert 8210 points

Part Number: 66AK2H12

Hi,

Customer clear TIMHIRS and TIMLORS, but TSTAT_LO and TSTAT_HI are not reset to 0.

3.6 Timer Reset Sources

https://www.ti.com.cn/cn/lit/ug/sprugv5a/sprugv5a.pdf

TImer mode is dual 32bit unchain mode. Is there a demo available for reference?

over 3 years ago

0 Rajarajan Uthayakumar over 3 years ago

TI__Expert 4314 points

Hi Nancy,

Timer example is available TI-RTOS SDK. I will update the code reference and project examples ASAP.

Thanks,

Rajarajan U

0 Nancy Wang over 3 years ago in reply to Rajarajan Uthayakumar

TI__Expert 8210 points

Hi,

Thanks!

Is there a reference code for the customer's problem? Or how to debug?

0 Rajarajan Uthayakumar over 3 years ago in reply to Nancy Wang

TI__Expert 4314 points

Hi Nancy,

Nancy Wang said:
Is there a reference code for the customer's problem?

Reference code or project is not available for the customer's problem.

But, the CSL APIs have been available for Timer configuration (These APIs abstract the register access, but all the necessary functionality was included).

Location :

"TIRTOS_SDK_FOLDER}/pdk_c667x_2_0_16/packages/ti/csl/docs/doxygen/html/group___c_s_l___t_i_m_e_r___f_u_n_c_t_i_o_n.html" (Kindly open this API documentation in browser).

For example : CSL_TmrReset64(CSL_TmrHandle hTmr) resets the 64-bit timer which in turn sets TMR_TGCR_TIMLORS=0,TMR_TGCR_TIMHIRS=0.

Thanks,

Rajarajan U

Processors

Processors forum

66AK2H12: Timer reset bit