Dear all
We would like to clock the receiver-section of the McBSP on a 5502 device with external generated 4.8MHz.
This clock shall be used as input to the sample-rate generator (SRG), which divides down the clock to provide a lower clock to the transmitter.
The datasheet and SPRU592E (McBSP Reference Guide) are not very detailed concerning this topic. It should be possible with SRG input clock
selection from CLKR pin, CLKXM set to 1 (internal CLKX driven by SRG) and CLKRM set to 0 (CLKR pin is an input).
Is it possible to use the McBSP in such a configuration?
Thanks in advance
Peter