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AM3352: DDR3 schematics review

GukHyun Lee
Intellectual 260 points
Part Number: AM3352

Hi experts.

I attached schematic pages of AM3352 Processor and DDR3.

I just hope the experts take a look at the interfaces between AM3352 and DDR3 and parts around DDR3.

Really thanks for help.

2727.SCH.pdf

  • 0
    TI__Guru**** 191939 points

    Hello Lee, 

    Thank you for the schematics.

    Please expect review comments on the attached schematics by end of next week.

    Regards,

    Sreenivasa

  • +1 in reply to Kallikuppa Sreenivasa
    TI__Guru**** 191939 points

    Hello Lee, 

    Thank you for your request to review the schematics section.

    Schematics review – comments/suggestion

    General

    • Schematic focus on DDR interface to processor and associated processor circuit, power supplies associated to memory interface,
    • Recommend identifying all the diff signals by providing an indication including the DDR_CLK

     

    ADC

    • Processor VREFP and VREFN connections looks too complex. Not sure on the need for so many caps

     

    Interface

    • Good practice to connect a series termination for the ethernet and LCD interface

     

    Soc Power

    • VDDSHV1… VDDSHV6 Please configure the required configurations and make the other ferrite a DNP
    • PMIC inductor selection- please ensure the selection matches the requirement since the inductor used in the design is not similar to the one recommended in the datasheet

    DDR interface

    • Processor DDR_VREF : Do not populate R12, R11, C9 and C10. VDDR_VEF connects from U11
    • Databus DDR_D[15..0] are bi-direction, please update the indications for the DDR and processor
    • A[14:0], BA[2:0] and ODT are input signals for DDR, please update
    • R144 please use a 1% resistor
    • Consider changing VDDS_DDR decap values to 0.1 uF for the DDR
    • Please separate clock termination from other terminations for clarity near to DDR
    • Please check enable logic for U11, VTT_EN_3.3V is a single net, not connected to processor (connect to C18 pin)
    • U11 PGGOOD: add a TP for debug
    • C140 can be a DNP
    • R166 can be a 0R to start with
    • Processor decoupling not provided for VDDS_DDR

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/803148/am3352-ddr3-schematic-design

    Please let me know if you have any questions.

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    Intellectual 260 points

    Hello, Sreenivasa.

    Really Thank you so much for your kind reply.

    I am trying to fix stuffs based on your comments.

    I have questions.

    • VDDSHV1… VDDSHV6 Please configure the required configurations and make the other ferrite a DNP

    I don't know how to configure what power source to use for the processor

    For example, for the VDDSHV3, what should I select among VDIG1, VAUX2 and VMMC.

    When I took a look at AM335x SK Board:

    VDDSHV1 : VDIG1

    VDDSHV2 : VMMC

    VDDSHV3 : VMMC

    VDDSHV4 : VMMC

    VDDSHV5 : VMMC

    VDDSHV6 : VAUX2

    but  AM335x EVM Board:

    VDDSHV1 : VAUX2

    VDDSHV2 : VMMC

    VDDSHV3 : VAUX2

    VDDSHV4 : VVMMC

    VDDSHV5 : VAUX2

    VDDSHV6 : VAUX2

    How they are selected?

  • +1 in reply to GukHyun Lee
    TI__Guru**** 191939 points

    Hello Lee, 

    Each of the VDDSHV power some peripheral. The supply depend on the peripheral connected.

    Please review the schematics along with the datasheet to map the peripheral that you are connecting and the voltage level required.

    Depending on the voltage required, you can configure the supply level.

    Regards,

    Sreenivasa