Part Number: AM3352
Hi,
Our customer is using AM3352 with PMIC:TPS65910AA1RSL and DDR2 (PME810816CBR-E7IN) for RAM.
However, TPS65910AA1RSL is no longer available and we are considering to substitute it with TPS65910A31A1RSL.
Unfortunately, the TPS65910A31A1RSL, which is a PMIC for DDR3, has a VDDS_DDR of 1.5V at startup, and we believe it must be changed to 1.8V by configuration after startup to meet DDR2 standards.
Will the AM3352 have trouble operating if VDDS_DDR changes from 1.5V to 1.8V after startup while it is running in internal RAM?
In terms of timing, I think it would not be a problem if the change is made before setting EMIF in the SPL, but I am not certain if this is correct from a device standpoint.
(Not sure what they are using for the OS)
Best Regards,
Kouji Nishigata
