Problems with SDRAM accessed by C6713B

Keven74263

Hi,

I am am doing my project with C6713B, and now i used a SDRAM controled by CE0 of EMIF, the SDRAM is 4Bank x 2M x 16bits. when I test it using a program, it appears wrong data in the memory window in CCS3.3. I have checked the board and there's no short, every data wire and address wire seem right. But every time I write 0 or 1 to the SDRAM, it always seems there are offsets .I wonder what the question is ? The program which I used is below

#define SDRAM_BASE_ADDRESS 0x80000000

main()
{
    int i;

     for(i=0;i<32;i++)
    {
       *(int *)(SDRAM_BASE_ADDRESS+i) =1;
     }
     exit(0);
}

and there appears such datas in the memory window

0x80000000 30721 30720 30721
0x80000006 30720 30721 31744
0x8000000C 30721 30720 30721
0x80000012 30720 30721 31744
0x80000018 30721 31744 30721
0x8000001E 31744 30720 30720
0x80000024 30720 30720 30720
0x8000002A 30720 30720 31744
0x80000030 30720 31744 30720
0x80000036 31744 30720 31744
0x8000003C 30720 31744 30720
0x80000042 31744 30720 31744
0x80000048 30720 31744 30720
0x8000004E 31744 30720 31744
0x80000054 30720 31744 30720
0x8000005A 31744 30720 31744
0x80000060 30720 31744 30720
0x80000066 31744 30720 31744
0x8000006C 30720 31744 30720
0x80000072 30720 30720 30720
0x80000078 30720 30720 30720
0x8000007E 30720 30720 30720
0x80000084 30720 30720 30720
0x8000008A 31744 30720 31744
0x80000090 30720 30720 30720
0x80000096 30720 30720 30720
0x8000009C 30720 30720 30720
0x800000A2 30720 30720 30720

over 14 years ago

0 Brad Griffis over 14 years ago

TI__Guru*** 125430 points

Looks like your SDRAM has not been configured. Are you using the 6713 gel file? I assume if you try to write to 0x80000000 through the memory window that you cannot successfully change it there either, right?

0 Keven74263 over 14 years ago in reply to Brad Griffis

Prodigy 250 points

The SDRAM has been configured using function "init_emif()" which isn't listed here. As you assumed, when I write a data through the memory window, it can't change successfully either. I tested the data pins and address pins with the digital oscilloscope, the wave displayed on the screen are all right voltage levels as the DSK's. Is it the problem of the SDRAM itself? or maybe others?

0 Brad Griffis over 14 years ago in reply to Keven74263

TI__Guru*** 125430 points

Questions:

Is this your own hardware or the DSK? If your own hardware:
- Did you figure out appropriate PLL settings based on whatever clock you supply on your board?
- Did you figure out the appropriate SDRAM timings based on your memory device?
Is the PLL being configured prior to the SDRAM controller?

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Problems with SDRAM accessed by C6713B