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Original question:

TMS320C6657: How to verify GPIO pins

TMS320C6657: How to access GPIO Pins through the registers for TMS320C6657

Cynthia Le
Prodigy 50 points
Part Number: TMS320C6657

Hi,

I'm trying to understand how the hGpio->BANK_REGISTERS[index] work for the TMS320C6657 GPIO pins. After initialization, it looks like I have BANK_REGISTERS of size 2. Would I access GPIO Pin 30 by accessing hGpio->BANK_REGISTERS[1].IN_DATA[15]?

I'm not sure if this is what it means by the registers [31:16] are reserved.

Thanks

  • 0
    TI__Mastermind 25535 points

    Cynthia,

    Let me look into it and get back.

    Regards

    Shankari G

  • 0
    TI__Mastermind 25535 points

    Cynthia,

    The GPIO PIN registers [16 : 31 ] are not reserved. All the 32 GPIO PINS are accessible in C6657.

    To answer your question, I have experimented to access the GPIO PIN 30.

    This is the code to access the GPIO PIN 30. Similarly, you can use the all the GPIO PINS.

    I have posted a video on how to view the values of GPIO in the memory browser ... after the set data register values are written..

    ------------------------

    #define GPIO_BASE (0x2320000)
    #define GPIO_DIR_OFFSET (0x10)
    #define GPIO_SETDATA_OFFSET (0x14)

    ....

    volatile uint32_t *reg_val;
    reg_val = (volatile uint32_t *)(GPIO_BASE + GPIO_DIR_OFFSET);
    UART_printf("\n value before in (GPIO_BASE + GPIO_DIR_OFFSET) = 0x%X \n", *reg_val);
    // configure as output pin -- write 0 to the Direction register
    *reg_val &= ~ (1 << 30); // To configure GPIO[30]
    UART_printf("\n value after in reg_val Direction register = 0x%X \n", *reg_val);

    reg_val = (volatile uint32_t *) (GPIO_BASE + GPIO_SETDATA_OFFSET);
    UART_printf("\n value before (GPIO_BASE + GPIO_SETDATA_OFFSET) = 0x%X \n", *reg_val);
    // Write value 1 in the set data register
    *reg_val |= (1 << 30); // To set the data register of  GPIO[30]
    UART_printf("\n value after in reg_val set data register = 0x%X \n", *reg_val);

    Regards

    Shankari G

  • 0 in reply to Shankari G
    Prodigy 50 points

    I was able to write to the GPIO pins 16-31 using your example.

    However, that brings up a different question I now have. When I open the GPIO module, it returns hGpio->BANK_REGISTERS of size 2:

    Based on the documentation: https://www.ti.com/lit/ug/sprugv1/sprugv1.pdf?ts=1655751834231 it shows that bits [16:31] are reserved for all of the registers.

    Therefore, I assumed that to access GPIO Pins 1-16 you would use BANK_REGISTERS[0] and the bit index [0:15] for the registers (DIR, OUT_DATA, etc.). And to access GPIO Pins 17-32 you would use BANK_REGISTERS[1] and the bit index [0:15].

    Can you explain what the BANK_REGISTER[1] is used for then? Since I am able to write to GPIO Pin 30 by writing to BANK_REGISTER[0] and OUT_DATA[30].

    Thanks

  • 0 in reply to Cynthia Le
    TI__Mastermind 25535 points

    Cynthia,

    Would you please tell me, which software package you are referring to?

    I mean, the code that you are referring "BANK_REGISTERS[1] " is part of which software package? File name ?

    1. Name of the package ?

    2. Is it Ti offered?

    3. The weblink from which you downloaded ?

    Regards

    Shankari G

  • +1 in reply to Shankari G
    Prodigy 50 points

    It's apart of the SDK I downloaded from TI. The project name is platform_lib_evmc6657l. It looks like when CSL_GPIO_open(0) is called that is when the BANK_REGISTERS[0] and BANK_REGISTERS[1] is defined. 

  • 0 in reply to Cynthia Le
    TI__Mastermind 25535 points

    Cynthia,

    This SDK is common code source / framework designed for the series of devices such as Keystone I and keystone II.

    ---

    For C6657, in the data maual, I could see only one instance/module of GPIO with 32 PINS.

    Even in the source code of Platform_lib_evmc6657, the GPIO Bank number is 0. ( Which is evident that the instance/module of GPIO is only one ) 

    #define GPIOBANKNUM     (0)

    ----

    For other devices, the GPIO instances may be greater than 1.

    ---

    If we are able to access all the 32 GPIO PINS with just the BANK_REGISTERS[0], you can go ahead, ignoring the BANK_REGISTERS[1].

    --

    To explain you further,

    look at this code....

    ----

    Uint8 bankIndex, bitPos;

    bankIndex = pinNum / 32U;
    bitPos = pinNum % 32U;

    CSL_FINSR (hGpio->BANK_REGISTERS[bankIndex].DIR, bitPos, bitPos, 0U);

    ---

    Consider there are two instancesmodules of GPIO for some other processor device....

    Consider there are 32 PINS per instance of GPIO; which means 64 PINS for 2 GPIO-instances/mosules.

    Consider, the pins 0 - 31 of GPIO-1  i.e., 32 pins belongs to BANK_REGISTERS[0]

    Consider, the pins 0 - 31 of GPIO- 2 i.e., 32 pins belongs to BANK_REGISTERS[1]

    ===> The bankindex will hold the value of  " 0"   --- "pinNum / 32U" for the pins  0 - 31 ------> GPIO - 1

    ===> The bankindex will hold the value of "1" -- "pinNum / 32 for the pins 32 - 63 --------> GPIO - 2

    Or otherwise, in some processor devices, there might be one single module of GPIO with 64 pins instead of 32 PINS...

    I hope this helps!.

    Regards

    Shankari G