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TMDS64GPEVM: GPIO interrupt

Part Number: TMDS64GPEVM
Other Parts Discussed in Thread: SYSCONFIG

Hello,

I'm currently working on the TMDS64GPEVM board and i'm trying to use the example : "gpio_input_interrupt_am64x-evm_r5fss0-0_nortos_ti-arm-clang" implementation into another example : "empty_am64x-evm_system_freertos".

I modified the "empty_am64x-evm_system_freertos" exemple to only work with R5FSS0_0 and R5FSS0_1.

I modified the empty tasks of the example to not exit immediately (add while(1) loop before calling board_drivers_close and drivers_close).

I configured the sysconfig to have the GPIO1_43 input with rising edge trig type on the R5FSS0_1 core INSTEAD of the R5FSS0_1 core.

I copied the interrupt initialization from the "gpio_input_interrupt_am64x-evm_r5fss0-0_nortos_ti-arm-clang" example, changing only the core number:

CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_8
Instead of
CSLR_R5FSS0_CORE0_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_8.

I see that a call to sciclient is done in the "gpio_input_interrupt_am64x-evm_r5fss0-0_nortos_ti-arm-clang" example. Do I have to use this init too?

Both cases (sciclient init or not) the interrupt is never triggered.

I don't fully understand how to initialize a simple GPIO interrupt, do you have some information for me?

Why using the INTROUTER0_OUTP_8 and not the INTROUTER0_OUTP_0 for example?

I go step by step and the next modification is to change GPIO1_43 input with another one (MCU_GPIO0_7 for example)

Here is my code:

/*
 *  Copyright (C) 2021 Texas Instruments Incorporated
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <stdio.h>
#include <kernel/dpl/DebugP.h>
#include <kernel/dpl/AddrTranslateP.h>
#include <kernel/dpl/HwiP.h>
#include "ti_drivers_config.h"
#include "ti_drivers_open_close.h"
#include "ti_board_open_close.h"

#include <drivers/gpio.h>
#include <board/led.h>

#define OUTPUT_PIN_0    5

#if 1
#define INPUT_PIN_0     43
#endif
#if 0
#define INPUT_PIN_1     7
#endif

#if 1
static uint32_t gGpioBaseAddr;
static HwiP_Object gGpioHwiObject;
#endif
#if 0
static uint32_t gMcuGpioBaseAddr;
static HwiP_Object gMcuGpioHwiObject;
#endif
#if 1
static uint8_t gToggle = 0;
#endif

extern LED_Handle gLedHandle[CONFIG_LED_NUM_INSTANCES];

/*
 * This is an empty project provided for all cores present in the device.
 * User can use this project to start their application by adding more SysConfig modules.
 *
 * This application does driver and board init and just prints the pass string on the console.
 * In case of the main core, the print is redirected to the UART console.
 * For all other cores, CCS prints are used.
 */

#if 1
static void GPIO_pinIsrFxn(void *args)
{
    /*
     * Handle pin interrupt - This is pulse interrupt. No need to clear status
     */
    if (gToggle != 1)
    {
        LED_on(gLedHandle[CONFIG_LED0], 0);
        gToggle = 1;
    }
    else
    {
        LED_off(gLedHandle[CONFIG_LED0], 0);
        gToggle = 0;
    }
}
#endif

#if 0
static void MCU_GPIO_pinIsrFxn(void *args)
{
    /*
     * Handle pin interrupt - This is pulse interrupt. No need to clear status
     */
    if (gToggle != 1)
    {
        LED_on(gLedHandle[CONFIG_LED0], 0);
        gToggle = 1;
    }
    else
    {
        LED_off(gLedHandle[CONFIG_LED0], 0);
        gToggle = 0;
    }
}
#endif

void empty_main(void *args)
{
    /* Open drivers to open the UART driver for console */
    Drivers_open();
    Board_driversOpen();

    LED_on(gLedHandle[CONFIG_LED0], 0);

    //BO_220628

#if 1
    //GPIO1_43 is connected to button on EVM
    uint32_t pinNum          = INPUT_PIN_0;
    uint32_t intrNum         = CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_8; // Why 8?
    uint32_t bankNum         = GPIO_GET_BANK_INDEX(pinNum);

    /* Address translate */
    gGpioBaseAddr = (uint32_t) AddrTranslateP_getLocalAddr(CSL_GPIO1_BASE);

    /* Setup GPIO for interrupt generation */
    GPIO_setDirMode(gGpioBaseAddr, pinNum, GPIO_DIRECTION_INPUT);
    GPIO_setTrigType(gGpioBaseAddr, pinNum, GPIO_TRIG_TYPE_RISE_EDGE);
    GPIO_bankIntrEnable(gGpioBaseAddr, bankNum);

    /* Register pin interrupt */
    HwiP_Params hwiPrms;
    HwiP_Params_init(&hwiPrms);
    hwiPrms.intNum   = intrNum;
    hwiPrms.callback = &GPIO_pinIsrFxn;
    hwiPrms.args     = (void *) pinNum;
    int32_t retVal = HwiP_construct(&gGpioHwiObject, &hwiPrms);
    DebugP_assert(retVal == SystemP_SUCCESS );
#endif

#if 0
    //MCU_GPIO0_7 will be connected to MCU_GPIO0_8 output externally
    pinNum          = INPUT_PIN_1;
    intrNum         = CSLR_R5FSS0_CORE1_INTR_MCU_MCU_GPIOMUX_INTROUTER0_OUTP_0; // Why 0?
    bankNum         = GPIO_GET_BANK_INDEX(pinNum);

    /* Address translate */
    gMcuGpioBaseAddr = (uint32_t) AddrTranslateP_getLocalAddr(CSL_MCU_GPIO0_BASE);

    /* Setup GPIO for interrupt generation */
    GPIO_setDirMode(gMcuGpioBaseAddr, pinNum, GPIO_DIRECTION_INPUT);
    GPIO_setTrigType(gMcuGpioBaseAddr, pinNum, GPIO_TRIG_TYPE_RISE_EDGE);
    GPIO_bankIntrEnable(gMcuGpioBaseAddr, bankNum);

    /* Register pin interrupt */
    HwiP_Params_init(&hwiPrms);
    hwiPrms.intNum   = intrNum;
    hwiPrms.callback = &MCU_GPIO_pinIsrFxn;
    hwiPrms.args     = (void *) pinNum;
    retVal = HwiP_construct(&gMcuGpioHwiObject, &hwiPrms);
    DebugP_assert(retVal == SystemP_SUCCESS );
#endif

    //END_BO_220628

    DebugP_log("R5FSS0-1 : All tests have passed!!\r\n");

    /*
    static uint8_t prev;
    uint8_t curr;
    */

    while (1)
    {
        /*
        curr = GPIO_pinRead(gGpioBaseAddr, INPUT_PIN_0);

        //Detect rising edge
        if (curr == 1 && prev == 0)
        {
            LED_on(gLedHandle[CONFIG_LED0], 0);
        }
        //Detect falling edge
        if (curr == 0 && prev == 1)
        {
            LED_off(gLedHandle[CONFIG_LED0], 0);
        }

        prev = curr;
        */
    }

    Board_driversClose();
    Drivers_close();
}

 

Sincerely,

Bastien

  • Hi Bastien,

    I am routing your query to our RTOS expert for comments.

  • dear Bastien, 

    our team is looking into this query we will have a response shortly

    Regards

    Anshu

  • Dear Bastien,
    Please follow the below procedure to configure GPIO_Interrupt on C13 Pin for R5FSS0_1 Core.
    1. Add GPIO peripheral in system.config as per attached image.
    2. Change GPIO initializations as per below code .
    /*
    * Copyright (C) 2021 Texas Instruments Incorporated
    *
    * Redistribution and use in source and binary forms, with or without
    * modification, are permitted provided that the following conditions
    * are met:
    *
    * Redistributions of source code must retain the above copyright
    * notice, this list of conditions and the following disclaimer.
    *
    * Redistributions in binary form must reproduce the above copyright
    * notice, this list of conditions and the following disclaimer in the
    * documentation and/or other materials provided with the
    * distribution.
    *
    * Neither the name of Texas Instruments Incorporated nor the names of
    * its contributors may be used to endorse or promote products derived
    * from this software without specific prior written permission.
    *
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
    * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
    * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
    * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
    * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
    * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
    * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
    * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    */

    #include <stdio.h>
    #include <kernel/dpl/DebugP.h>
    #include "ti_drivers_config.h"
    #include "ti_drivers_open_close.h"
    #include "ti_board_open_close.h"
    #include <kernel/dpl/AddrTranslateP.h>

    /*
    * This is an empty project provided for all cores present in the device.
    * User can use this project to start their application by adding more SysConfig modules.
    *
    * This application does driver and board init and just prints the pass string on the console.
    * In case of the main core, the print is redirected to the UART console.
    * For all other cores, CCS prints are used.
    */

    static void GPIO_pinIsrFxn(void *args);
    #define GPIO_INTR_NO CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_8
    uint32_t gGpioBaseAddr = GPIO_PUSH_BUTTON_BASE_ADDR;
    HwiP_Object gGpioHwiObject;

    extern void Board_gpioInit(void);

    void empty_main(void *args)
    {
    /* Open drivers to open the UART driver for console */
    Drivers_open();
    Board_driversOpen();
    Board_gpioInit();

    /* Register pin interrupt */
    HwiP_Params hwiPrms;



    uint32_t pinNum = GPIO_PUSH_BUTTON_PIN;
    uint32_t intrNum = GPIO_INTR_NO;
    uint32_t bankNum = GPIO_GET_BANK_INDEX(pinNum);

    /* Address translate */
    gGpioBaseAddr = (uint32_t)AddrTranslateP_getLocalAddr(GPIO_PUSH_BUTTON_BASE_ADDR);

    /* Setup GPIO for interrupt generation */
    GPIO_setDirMode(gGpioBaseAddr, pinNum, GPIO_DIRECTION_INPUT); 
    GPIO_setTrigType(gGpioBaseAddr, pinNum, GPIO_TRIG_TYPE_RISE_EDGE);
    GPIO_bankIntrEnable(gGpioBaseAddr, bankNum);


    HwiP_Params_init(&hwiPrms);
    hwiPrms.intNum = intrNum;
    hwiPrms.callback = &GPIO_pinIsrFxn;
    hwiPrms.args = (void *) pinNum;
    int32_t retVal = HwiP_construct(&gGpioHwiObject, &hwiPrms);
    DebugP_assert(retVal == SystemP_SUCCESS );
    while (1)
    {

    }

    Board_driversClose();
    Drivers_close();
    }



    static void GPIO_pinIsrFxn(void *args)
    {
    /*
    * Handle pin interrupt - This is pulse interrupt. No need to clear status
    */

    DebugP_log("R5FSS0-1 : All tests have passed!!\r\n");
    DebugP_log("All tests have passed!!\r\n");

    }

    3. Include board.c file in your workspace .
    /*
    * Copyright (C) 2018-2021 Texas Instruments Incorporated
    *
    * Redistribution and use in source and binary forms, with or without
    * modification, are permitted provided that the following conditions
    * are met:
    *
    * Redistributions of source code must retain the above copyright
    * notice, this list of conditions and the following disclaimer.
    *
    * Redistributions in binary form must reproduce the above copyright
    * notice, this list of conditions and the following disclaimer in the
    * documentation and/or other materials provided with the
    * distribution.
    *
    * Neither the name of Texas Instruments Incorporated nor the names of
    * its contributors may be used to endorse or promote products derived
    * from this software without specific prior written permission.
    *
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
    * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
    * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
    * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
    * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
    * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
    * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
    * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    */

    #include <stdlib.h>
    #include <drivers/hw_include/cslr_soc.h>
    #include <drivers/gpio.h>
    #include <drivers/sciclient.h>
    #include "ti_drivers_config.h"

    /*
    * Board info
    */
    /* This is based on DMSC board config and core */
    #define BOARD_BUTTON_GPIO_INTR_NUM (CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_8)
    #define BOARD_BUTTON_GPIO_SWITCH_NUM (5)

    /** \brief bank interrupt source index base */
    #define TISCI_BANK_SRC_IDX_BASE_GPIO0 (90U)
    #define TISCI_BANK_SRC_IDX_BASE_GPIO1 (90U)
    #define TISCI_BANK_SRC_IDX_BASE_MCU_GPIO0 (90U)

    static void Sciclient_gpioIrqSet(void);
    static void Sciclient_gpioIrqRelease(void);

    void Board_gpioInit(void)
    {
    Sciclient_gpioIrqSet();
    }

    void Board_gpioDeinit(void)
    {
    Sciclient_gpioIrqRelease();
    }

    uint32_t Board_getGpioButtonIntrNum(void)
    {
    return (BOARD_BUTTON_GPIO_INTR_NUM);
    }

    uint32_t Board_getGpioButtonSwitchNum(void)
    {
    return (BOARD_BUTTON_GPIO_SWITCH_NUM);
    }

    static void Sciclient_gpioIrqSet(void)
    {
    int32_t retVal;
    struct tisci_msg_rm_irq_set_req rmIrqReq;
    struct tisci_msg_rm_irq_set_resp rmIrqResp;

    /* For setting the IRQ for GPIO using sciclient APIs, we need to populate
    * a structure, tisci_msg_rm_irq_set_req instantiated above. The definition
    * of this struct and details regarding the struct members can be found in
    * the tisci_rm_irq.h.
    */
    /* Initialize all flags to zero since we'll be setting only a few */
    rmIrqReq.valid_params = 0U;
    /* Our request has a destination id, so enable the flag for DST ID */
    rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
    /* DST HOST IRQ is the output index of the interrupt router. We need to make sure this is also enabled as a valid param */
    rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
    /* This is not a global event */
    rmIrqReq.global_event = 0U;
    /* Our interrupt source would be the GPIO peripheral. The source id has to be a device id recognizable by the SYSFW.
    * The list of device IDs can be found in tisci_devices.h file under source/drivers/sciclient/include/tisci/am64x_am243x/.
    * In GPIO case there are 3 possible options - TISCI_DEV_GPIO0, TISCI_DEV_GPIO1, TISCI_DEV_MCU_GPIO0. For input interrupt,
    * we need to choose the TISCI_DEV_GPIO1
    */
    rmIrqReq.src_id = TISCI_DEV_GPIO1;
    /* This is the interrupt source index within the GPIO peripheral */
    rmIrqReq.src_index = TISCI_BANK_SRC_IDX_BASE_GPIO1 + GPIO_GET_BANK_INDEX(GPIO_PUSH_BUTTON_PIN);
    /* This is the destination of the interrupt, usually a CPU core. Here we choose the TISCI device ID for R5F0-0 core.
    * For a different core, the corresponding TISCI device id has to be provided */
    rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE1;
    /* This is the output index of the interrupt router. This depends on the core and board configuration */
    rmIrqReq.dst_host_irq = Board_getGpioButtonIntrNum();
    /* Rest of the struct members are unused for GPIO interrupt */
    rmIrqReq.ia_id = 0U;
    rmIrqReq.vint = 0U;
    rmIrqReq.vint_status_bit_index = 0U;
    rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;

    /* To set the interrupt we now invoke the Sciclient_rmIrqSet function which
    * will find out the route to configure the interrupt and request DMSC to
    * grant the resource
    */
    retVal = Sciclient_rmIrqSet(&rmIrqReq, &rmIrqResp, SystemP_WAIT_FOREVER);
    if(0 != retVal)
    {
    DebugP_log("[Error] Sciclient event config failed!!!\r\n");
    DebugP_assert(FALSE);
    }

    return;
    }

    static void Sciclient_gpioIrqRelease(void)
    {
    int32_t retVal;
    struct tisci_msg_rm_irq_release_req rmIrqReq;
    /* For releasing the IRQ for GPIO using sciclient APIs, we need to populate
    * a structure, tisci_msg_rm_irq_release_req instantiated above. The definition
    * of this struct and details regarding the struct members can be found in
    * the tisci_rm_irq.h. These are similar to the struct members for the set request
    * used above.
    */
    /* Initialize all flags to zero since we'll be setting only a few */
    rmIrqReq.valid_params = 0U;
    /* Our request has a destination id, so enable the flag for DST ID */
    rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
    /* DST HOST IRQ is the output index of the interrupt router. We need to make sure this is also enabled as a valid param */
    rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
    /* This is not a global event */
    rmIrqReq.global_event = 0U;
    /* Our interrupt source would be the GPIO peripheral. The source id has to be a device id recognizable by the SYSFW.
    * The list of device IDs can be found in tisci_devices.h file under source/drivers/sciclient/include/tisci/am64x_am243x/.
    * In GPIO case there are 3 possible options - TISCI_DEV_GPIO0, TISCI_DEV_GPIO1, TISCI_DEV_MCU_GPIO0. For input interrupt,
    * we need to choose the TISCI_DEV_GPIO1
    */
    rmIrqReq.src_id = TISCI_DEV_GPIO1;
    /* This is the interrupt source index within the GPIO peripheral */
    rmIrqReq.src_index = TISCI_BANK_SRC_IDX_BASE_GPIO1 + GPIO_GET_BANK_INDEX(GPIO_PUSH_BUTTON_PIN);
    /* This is the destination of the interrupt, usually a CPU core. Here we choose the TISCI device ID for R5F0-0 core.
    * For a different core, the corresponding TISCI device id has to be provided */
    rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE1;
    /* This is the output index of the interrupt router. This depends on the core and board configuration */
    rmIrqReq.dst_host_irq = Board_getGpioButtonIntrNum();
    /* Rest of the struct members are unused for GPIO interrupt */
    rmIrqReq.ia_id = 0U;
    rmIrqReq.vint = 0U;
    rmIrqReq.vint_status_bit_index = 0U;
    rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;

    /* To set the interrupt we now invoke the Sciclient_rmIrqRelease function which
    * will find specifics about the route and request DMSC/SYSFW to relase/clear the interrupt
    */
    retVal = Sciclient_rmIrqRelease(&rmIrqReq, SystemP_WAIT_FOREVER);
    if(0 != retVal)
    {
    DebugP_log("[Error] Sciclient event reset failed!!!\r\n");
    DebugP_assert(FALSE);
    }

    return;
    }
    4. Compile and execute binary on your Hw.
    Please Let me know if this resolves your query

    Why using the INTROUTER0_OUTP_8 and not the INTROUTER0_OUTP_0 for example?

    will need few days to answer this query. 

    Regards

    Anil
  • Hello,

    Thanks for you detailled answer.

    I adapted my code with your explanations but the sciclient trig an error if i try to change the R5FSS0 core.

    I would like to test the same on the "gpio_input_interrupt_am64x-evm_r5fss0-0_nortos_ti-arm-clang" project changing the core.

    How to change the core of a project?

    Sincerely,

    Bastien


  • Dear ,


    Please follow the below procedure to change Destination core in board.c file for nortos_ti-arm-clang and free_rtos_ti-arm-clang Projects.

    1. Try to change below macro based on your destinated core and I changed my destination core as RFSS0_1.

    #define BOARD_BUTTON_GPIO_INTR_NUM CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_8

    2.Change rmIrqReq.dst_id value in static void Sciclient_gpioIrqSet(void) function based on your destinated core
    and I modified destination core as RFSS0_1 .
    rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE1;

    3.Change rmIrqReq.dst_id value in static void Sciclient_gpioIrqRelease(void) function based on your destinated core
    and I modified destination core as RFSS0_1 .
    rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE1;

    4. Compile code and Load binaries on your destinated core .

    Please Let me know if this resolves your query

  • Dear ,

    I followed the same above procedure in free_rtos project for RFSS0 core and software is running successfully ..

    Please try to made changes as per above procedure .

    Please find the attached image FYI..

  • Hello Anil,

    Thanks for your answer but it still doesn't work for me:

    Are you sure you're running on R5FSS0_1 core?

    Sincerely,

    Bastien

  • Hi ,

    Yes I am Running on RFSS0_1 core .
    Please find the attached image FYI..

    Please try to do CPU reset and power on Reset before Load binaries on RFSS0_1.

    Please share your empty.c file , board.c file and main.c file .

    Please Let me know if this resolves your query.


    Regards,

    S.Anil

  • 5187.empty_am64x-evm_r5fss0-0_freertos_ti-arm-clang.zip

    Hi ,

    Please find the attached project for your reference .

    Regards,

    S.Anil.

  • Dear 

    I have seen your project and found BOARD_BUTTON_GPIO_INTR_NUM macro value as (CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_8) .Please change this macro value to CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_11 and compile your code and flash binaries on R5FSS0_1 .

    Why using the INTROUTER0_OUTP_8 and not the INTROUTER0_OUTP_0 for example?

    Will need some more days to give details about configuration of Interrupt numbers for different cores .

    Regards,

    S.Anil.

  • Hell Anil,

    Thanks again for your answer.

    I don't get the interrupt connection from the driver to the core interrupt number.

    Reading the TRM and datasheet i understand those information:

    INTRTR_IN to INTROUTER0_OUTP is not OK so (/16)?

    The interrupt map is the same for R5FSS0_0 and R5FSS0_1 so why do we have to change the OUTP value?

    I don't find the information about the inside of the GPIO_MUX_INTRTR0 to link INTRTR_IN to INTROUTER0_OUTP.

    Sincerely,

    Bastien

  • Dear Bastien Ondel,
    We acknowledge your inputs and trying to update system config file and TRM in future release .
    As of now we are just configuring which is GPIO Pin is needed for the Interrupt and Type of interrupt for GPIO_Interrupt model .Along with these parameters , we are trying to add some more parameters in system config. So that customer will not worry about Interrupt Router and Interrupt numbers based on Core.

    Please follow the below procedure to change Destination core in board.c file till next release.


    1. Include board.c file in your workspace.

    2. Try to change the macro below based on your destination core as I changed my destination core as RFSS0_1.

    #define BOARD_BUTTON_GPIO_INTR_NUM CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_8

    3.Change rmIrqReq.dst_id value in static void Sciclient_gpioIrqSet(void) function based on your destination core
    and I modified destination core as RFSS0_1 .
    rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE1;

    4.Change rmIrqReq.dst_id value in static void Sciclient_gpioIrqRelease(void) function based on your destination core
    and I modified destination core as RFSS0_1 .
    rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE1;

    5. Compile code and Load binaries on your destination core .


    Note :

    Case 1 : You have asked one question why not BOARD_BUTTON_GPIO_INTR_NUM values as CSLR_R5FSS0_CORE0_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_0.?


    Please check the sciclient_defaultBoardcfg_rm.c at 187th Line and find it in below path
    ...mcu_plus_sdk_am64x_08_02_00_31\source\drivers\sciclient\sciclient_default_boardcfg\am64x_am243x.


    There is resource filed and it is starting from 8th source. So, we have to keep BOARD_BUTTON_GPIO_INTR_NUM value from CSLR_R5FSS0_CORE0_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_8 not CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_0.


    Case 2 : GPIO Interrupt configuration for R5FSS0_1 core .
    Please check the sciclient_defaultBoardcfg_rm.c at 185th Line and this field has allocated 2 Resources for CORE_0 and So, this macro should be start from CSLR_R5FSS0_CORE0_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_10 for R5FSS0_1  . (OUTP_8 and OUTP_9 allocated for R5FSS0_0 core.
    So, we have to keep BOARD_BUTTON_GPIO_INTR_NUM value as CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_11 .


    Please try to modify changes as above and we are trying to solve those configurations in next release.

    Thanks your input..

    Please Let me know if this resolves your query.

    Regards,

    S.Anil.

  • Hello Anil,

    I confirm the use of OUTP_11 instead of OUTP_8 is working. I understand now how the routing is done thank you.

    For the next step i would like to change the input (GPIO0_63) triggering the interrupt so i just have to change the pin number and leave the core destination to R5FSS0_1 and the interrupt number to OUTP11.

    Sincerely,

    Bastien

  • Dear ,

    Thanks for your quick reply.

    Please follow the below procedure for Interrupt configuration of GPIO0_63 .

    1. Please do the system config as per the below configurations.

    2. Include board.c file in your workspace.

    3. Please do below changes in Sciclient_gpioIrqSet() and Sciclient_gpioIrqRelease( ) functions in board.c file


    a. #define BOARD_BUTTON_GPIO_INTR_NUM CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_11
    b. rmIrqReq.src_id = TISCI_DEV_GPIO0;
    c. rmIrqReq.src_index = TISCI_BANK_SRC_IDX_BASE_GPIO0 + GPIO_GET_BANK_INDEX(63);
    d. rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE1;

    4. Please do below changes in empty.c file
    #define CSL_GPIO0_BASE (0x600000UL)
    uint32_t pinNum = BOARD_BUTTON_GPIO_INTR_NUM ;
    uint32_t intrNum = 63;

    5. Compile code and Load binaries on your destination core.

    Please Let me know if this resolves your query.

    Regards,

    S.Anil.

  • Hello,

    Here are the parts i modified

    sysconfig

    board.c

    empty.c

    Everything is alright. I also tried to switch the interrupt to OUTP_10 and it's ok too thanks.

    Sincerely,

    Bastien

  • Dear  ,

    Yes, It can be routed 10 or 11 for RFSS0_1 core it will work.

    Thanks.

    Regards,

    S.Anil.