Is C55x H/W breakpoint triggered by MMR access (read or write) supported ?

Kyosuke Kawamura

My customer tried to use hardware breakpoint when CPU access the address for memory mapped registers on C55x (5510).
When he set up the access in CCS breakpoint manager, but it didn't work.

Is C55x H/W breakpoint triggered by MMR access (read or write) supported ? I would like to know if it is tool setting issue or not.
Is there any descriptions for breakpoint, or good references to study ? If yes, could you tell me the link to the document ?

best regards,
Kyosuke Kawamura

over 15 years ago

Brad Griffis over 15 years ago

TI__Guru*** 125430 points

No, spra841 mentions the following in a section titled "Watchpoint Limitations":

"Finally, you cannot trigger a watchpoint on an access to the memory mapped register region
(word addresses 0x0…0x60) as this region is accessed using special address generation logic. "

I can confirm from personal experience too, i.e. could not set a watchpoint on any of the CPU registers.

Kyosuke Kawamura over 15 years ago in reply to Brad Griffis

TI__Intellectual 2330 points

Hi Brad,

Thanks for your information.
The document you pointed is also very helpful.

best regards,
Kyosuke Kawamura

Processors

Processors forum

Is C55x H/W breakpoint triggered by MMR access (read or write) supported ?