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TDA4VM: LPDDR4 8GB Questions

Part Number: TDA4VM

After a quick scan through the TDA4VM and Jacinto 7 docs and the eval boards, our team had a couple of questions:

  • The processor family says it can support up to 8GB LPDDR4, but is that only in a single chip configuration? I.e. can 2 4GB LPDDR4 chips be supported in a balanced-T or fly-by topology?
  • Up to how many different LPDDR4 chips can be supported?
  • Can dual-die or other more esoteric LPDDR4 formats be supported?
  • Can SO-DIMM or other form-factor LPDDR4 modules be supported by the processor as long as the physical memory is supported?
  • Hi Nicholas,

    TDA4VM supports only a single device (where data signals are routed point to point on the PCB). However, TDA4VM does support 2 ranks (chip selects). Thus, each DQ bit can be connected to two different die (but both die must be inside the same LP4 package). DIMMS are not supported.

    Regards,
    Kevin

  • Thanks Kevin, is there a reason DIMMs are not supported? I'm not familiar with the pinouts and general requirements for the modules. For example,

    • Pin mismatch for SO-DIMM components
    • Impedance or other electrical characteristic mismatches

    Also, does TI support DIMM modules with any of their processors and is it for the same reasons as above?