Used PinMux utility to generate registers setting for RMII interface on the AM1808 device. The utility generated this setting for PINMUX15 register:
#define PINMUX15_VALUE 0x00000088
This sets PINMUX15_3_0 so that internal clock is driven on this pin for RMII interface.
According to DS, Table 5-102, Note 2: Per the RMII industry specification, the RMII reference clock (RMII_MHZ_50_CLK) must have jitter tolerance of 50 ppm or less.
According to System Reference Guide, sec 6.3.4, Note: The SYSCLK7 output clock does not meet the RMII reference clock specification of 50MHz +/-50ppm. SYSCLK7 is the internal clock which is output when PINMUX15_3_0 is set to 8 like the PinMux utility recommends.
My reading is that the pin mux utility is giving the incorrect setting for PINMUX15[3:0] nibble. Can someone verify this and get the PinMux utility updated to give correct setting for PINMUX15 register?
Thanks.