Part Number: TDA4VM
hi Experts,
Understand the ECC for DDR is inline ECC and no need for external and additional flash to store the Hanmin code, but how about the ECC for MSRAM, Cache, and even the bus? Where they store the Hanmin code?
And also, if we enable the DDR ECC, the DDR throughput will higher a little bit than before, so what the impact for MSRAM/Cache if enable the ECC for them?
Thanks in advance.
Br,
Neo