TDA4VM: R5 issue

Cherry Zhou

Part Number: TDA4VM
Other Parts Discussed in Thread: SYSBIOS

Hi team,

Here's an issue from the customer may need your help:

The Timerk timer is required in the R5 project for TDA4. Referenced \ti-processor-SDK-RTOS-j721e-EVM-07_03_00_07\BIOS_6_83_02_07\packages\ti\SysBIOS\timers\gptimer\T. Timer initialization and configuration program in imer.c, but the following problems were encountered during building:

Q1: Can the program in the Timer.c file support R5? Can they call it directly in the SysBIOS project for R5?

Q2: If so, which .lib library in which directory does the undefined error need to be linked?

Could you help check this case? Thanks.

Best Regards,

Cherry

over 3 years ago

0 Parth Nagpal over 3 years ago

TI__Mastermind 42135 points

Hi Cherry,

Can you please share the cfg and makefile your customer is using for this?

Regards,
Parth

0 Cherry Zhou over 3 years ago in reply to Parth Nagpal

TI__Mastermind 22235 points

Hello Parth,

Thanks for your support.

Parth Nagpal said:
Can you please share the cfg and makefile your customer is using for this?

Please see the figure below:

cfg:

makefile:

Thanks and regards,

Cherry

0 Parth Nagpal over 3 years ago in reply to Cherry Zhou

TI__Mastermind 42135 points

Hi Cherry,

Looks like GP timer module is not supported. Please see the discussion https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1045917/am5728-why-dm-timer-and-not-gp-timer-in-ccs-for-am572x?tisearch=e2e-sitesearch&keymatch=gp%2520timer%2520am57xx#

For all purposes we use dmTimer itself. In the cfg file you shared also, gp timer module is not there. Any specific reason for using GPTimer? Have you tried APIs from DMTimer?

Regards,
Parth

0 Cherry Zhou over 3 years ago in reply to Parth Nagpal

TI__Mastermind 22235 points

Hey Parth,

Parth Nagpal said:
Any specific reason for using GPTimer?

Because in the block diagram of the chip description, it was found that the main domain has 20 GPTs.

Parth Nagpal said:
Have you tried APIs from DMTimer?

No, is there any demo for reference? If so, could you also help point to the directory (including the sysBIOS version with and CSL version without systems)?

Thanks and regards,

Cherry

0 Parth Nagpal over 3 years ago in reply to Cherry Zhou

TI__Mastermind 42135 points

Hi Cherry,

Cherry Zhou said:
Because in the block diagram of the chip description, it was found that the main domain has 20 GPTs.

From sys bios point of view, you can use DMTimers and pass them the instance of GP timer. The name has been carry forwarded from previous platform, you can use DMTimer for all your purposes.

You can refer to the CSL dm timer example at <PDK_Install_Path>\packages\ti\csl\test\dmTimerUt

Regards,
Parth

0 Cherry Zhou over 3 years ago in reply to Parth Nagpal

TI__Mastermind 22235 points

Hi Parth,

Follow the test in <PDK_Install_Path> \packages\ti\CSL\test\dmTimerUT\dmTimer_funcTest.c to do the following: Call csldmTimer_funcT firstThe est() function finds that an interrupt cannot be entered and that no configuration failure occurred during the configuration process (it was not modified during the test.The only modification is the addition of the cslApp_initBoard() function in csldmTimer_funcTest().As well as for the #define test_timer_base_ADDR (CSL_TIMER12_CFG_base) and #define test_timer_INT_NUM(CSRR_R5FSS1_CORE1_INTR_TIMER12_INTR_pend_0)

Because the customer's engineering is MCU2_1. An interrupt cannot be entered if a different timer has been attempted. Some of the programs are modified as follows:

For MCU2_1 projects, is this ok? Or what needs to be modified to use MCU2_1 projects?

Thanks and regards,

Cherry

+1 Parth Nagpal over 3 years ago in reply to Cherry Zhou

TI__Mastermind 42135 points

Hi Cherry,

The above changes seems fine for mcu2_1. One thing that might be causing the issue is that for mcu2_1 BUILD_MCU macro might be getting defined. If that's the case your base address and interrupt number will be overwritten. Try commenting out the complete #if defined section at line 1399 as per your image.

Regards,
Parth

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TDA4VM: R5 issue