TDA4VM: ADC test app

Deepak,

As per below link, this example does not seem to be supported for J721S2 or J721E platforms. This example is supported AM65x platform. Instead, can you please use csl_adc_singleshot_test_app or board_diag_adc examples for ADC?

https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/pdk_jacinto_08_02_00_21/docs/userguide/jacinto/faq/faq_binlist_jacinto.html

Regards,

Brijesh

Hi Brijesh,

Thank you for your response. board_diag_adc worked for me. Is it possible for you to share schematics for this EVM board? I need to see pin layout for ADC.

Thank you.

Regards,

Deepak

Hi Deepak,

Sorry, this cannot be shared in this forum. Can you please check with your local TI support to get this document?

Regards,

Brijesh

Hi Brijesh,

Looks like board_diag_adc is a braemetal demo app so I cannot add FreeRTOS APIs to create a periodic task and request single shot data periodically. Do you know how can we achieve this ? One way which I could think of is to port this app to freeRTOS demp app and build/ run it. Do you know if we have any other freeRTOS demo app that we can run to test ADC ?

Regards,

Deepak

Hi Deepak,

You could use refer to the example available in the folder ti-processor-sdk-rtos-j721e-evm-08_01_00_13\pdk_jacinto_08_01_00_36\packages\ti\csl\example\adc\adc_singleshot_test_app. This example is based on the CSL layer and is also baremetal example. I dont see any other ADC example in PDK, with freeRTOS support.

Regards,

Brijesh

Hey Brijesh,

I am using J721s2 evm board.

Regards,

Deepak

Hi Deepak,

oh ok, for J721S2, this is only example available in the PDK. Yes, in order to use OS in this example, you would require to port it to FreeRTOS, build and run it. 

Regards,

Brijesh

Hi Brijesh,

I ported the adc test app to freertos app and I can run the periodic task as expected but I am unable to see A72 boot up.

Could you please tell me if I am missing anything ?

Regards,

Deepak

Hi Deepak Uniyal,

Do you mean you are trying to load this example on A72? Please note FreeRTOS is not supported on A72 core. Please use HLOS like Linux or QNX on A72 cores. 

Regards,

Brijesh

Hi Brijesh,

No, I am loading this example on R5 (mcu1_0) and is working as expected but I want to boot A72 as well to run some other applications.

JFYI - A72 wasn't booting up with the original board_diag_adc (baremetal). After porting this app to freertos to run some periodic tasks, I made some makefile changes and board_diag_adc test app is working as expected. Now, I want to run some applications on A72 as well while ADC test app is running on R5 (mcu1_0). Since A72 never boots up, I am unable to progress further.

Regards,

Deepak

Hi Deepak,

Starting from SDK8.0 release, RTOS is not supported on A72 core. So you could run some baremetal example, as given in below link. Other option is to run some HLOS on A72. 

https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/pdk_jacinto_08_02_00_21/docs/userguide/jacinto/faq/faq_binlist_jacinto.html

Regards,

Brijesh

Hi Brijesh,

I am not running board_adc_diag example on A72. Here is what I want to achieve,

1. Run board_diag_adc test app on R5 (mcu1_0) FreeRTOS - This is working as expected.

2. Run our in house applications on A72 core - This isn't working since A72 is not booting up.

I need help on 2nd part.

Regards,

Deepak

Hi Deepak,

But which application are you planning to run on A72? Is it based on some RTOS? Also how are you loading this application? 

Regards,

Brijesh

Hi Brijesh,

Its a QNX based application. Right now, I am not loading any application, I just want to bootup A72.

Regards,

Deepak

Hi Deepak,

but do you mean to just power on A72? otherwise what do you mean bootup of A72? 

For powering it on, are you using gel files and CCS to connect to other cores? Then please check if there is any option in gel files to enable A72. 

Regards,

Brijesh

Yes, power on A72 and I am not using gel files and CCS.

FYI - when I run most of the examples under ti/drv/ folder, I see UART boot up logs on both MCU and A72 uart.

Its with this board_adc_diag, I am seeing only MCU UART boot up logs.

Regards,

Deepak

Hi Deepak Uniyal,

Are you using SBL to load the images? SBL can load only one appimage and since here you are loading image on mcu2_0, it will not power up A72. So if you want to load the image on A72, you need to replace appimage with the image for A72. 

Deepak Uniyal said:

FYI - when I run most of the examples under ti/drv/ folder, I see UART boot up logs on both MCU and A72 uart.

Its with this board_adc_diag, I am seeing only MCU UART boot up logs.

Yes, this is expected. Because MCU domain will show the prints from SBL and MCU domain application, whereas main uart will show prints from main domain cores, ie A72.

Regards,

Brijesh

Hi Brijesh,

Yes I am using SBL to load the image and I am building and loading board_adc_diag app on mcu1_0.

Question - Does board_diag_adc test app built on mcu1_0 loads A72 as well ?

Regards,

Deepak

Hi Deepak,

No, since this example is build for mcu1_0, it will not load/power up A72. 

Regards,

Brijesh

So is there a way I can load A72 as well ?

Regards,

Deepak

Well, there is a way, but bit complex.

You need to create appimage for mcu2_0, then appimage for a72, then need to combine both the appimages and create combined appimage... 

Regards,

Brijesh

Thank you Brijesh. I will try that. Do we need to make any SBL changes to load the combined image.

Also, could you please point me to any documentation on the utilities out2rprc and multicoreImageGen.

Regards,

Deepak

Hi Deepak,

No, no changes required in the SBL. 

Can you please check in PDK documentation? 

https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/pdk_jacinto_08_02_00_21/docs/userguide/jacinto/overview.html

Regards,

Brijesh